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Richard R. Shively
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2000 – 2009
- 2000
- [j6]Ranjan V. Sonalkar, Richard R. Shively:
An efficient bit-loading algorithm for DMT applications. IEEE Commun. Lett. 4(3): 80-82 (2000) - [c6]Richard Robert Shively, Egbert Ammicht, Paul David Davis:
Generalizing SPIHT: a family of efficient image compression algorithms. ICASSP 2000: 2059-2062
1990 – 1999
1980 – 1989
- 1989
- [c4]Richard R. Shively, Allen L. Gorin:
A reconfigurable fault-tolerant systolic signal processor. ICASSP 1989: 2397-2400 - [c3]Richard R. Shively, E. B. Morgan, T. W. Copley, Allen L. Gorin:
A high performance reconfigurable parallel processing architecture. SC 1989: 505-509 - 1987
- [c2]Allen L. Gorin, Richard R. Shively:
The ASPEN parallel computer, speech recognition and parallel dynamic programming. ICASSP 1987: 976-979 - 1984
- [j5]Richard R. Shively, W. V. Robinson Jr., D. E. Orton:
Cascading Transmission Gates to Enhance Multiplier Performance. IEEE Trans. Computers 33(7): 677-679 (1984) - 1982
- [j4]Richard R. Shively:
Architecture of a Programmable Digital Signal Processor. IEEE Trans. Computers 31(1): 16-22 (1982)
1970 – 1979
- 1975
- [j3]Ronald E. Crochiere, Lawrence R. Rabiner, Richard R. Shively:
A novel implementation of digital phase shifters. Bell Syst. Tech. J. 54(8): 1497-1502 (1975)
1960 – 1969
- 1969
- [j2]John H. Huttenhoff, Richard R. Shively:
Arithmetic Unit of a Computing Element in a Global, Highly Parallel Computer. IEEE Trans. Computers 18(8): 695-698 (1969) - 1968
- [j1]Richard R. Shively:
A Digital Processor to Generate Spectra in Real Time. IEEE Trans. Computers 17(5): 485-491 (1968) - 1965
- [c1]Richard R. Shively:
A silicon monolithic memory utilizing a new storage element. AFIPS Fall Joint Computing Conference (1) 1965: 637-647
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