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Nitin Chawla
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2020 – today
- 2023
- [c8]Giuseppe Desoli, Nitin Chawla, Thomas Boesch, Manui Avodhyawasi, Harsh Rawat, Hitesh Chawla, VS Abhijith, Paolo Zambotti, Akhilesh Sharma, Carmine Cappetta, Michele Rossi, Antonio De Vita, Francesca Girardi:
A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications. ISSCC 2023: 260-261 - 2021
- [c7]Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin:
Artificial Intelligence: Why moving it to the Edge? ESSCIRC 2021: 1-6 - [c6]Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin:
Artificial Intelligence: Why moving it to the Edge? ESSDERC 2021: 1-6 - 2020
- [j3]Nitin Chawla, Deepak Kumar, Dinesh Kumar Sharma:
Improving Cost for Data Migration in Cloud Computing Using Genetic Algorithm. Int. J. Softw. Innov. 8(3): 69-81 (2020)
2010 – 2019
- 2018
- [j2]Nitin Chawla, Deepak Kumar
:
Modelling of Cloud Computing Enablers Using MICMAC Analysis and TISM. Int. J. Ambient Comput. Intell. 9(3): 31-43 (2018) - 2017
- [c5]Giuseppe Desoli, Nitin Chawla, Thomas Boesch, Surinder Pal Singh, Elio Guidetti, Fabio De Ambroggi, Tommaso Majo, Paolo Zambotti, Manuj Ayodhyawasi, Harvinder Singh, Nalin Aggarwal:
14.1 A 2.9TOPS/W deep convolutional neural network SoC in FD-SOI 28nm for intelligent embedded systems. ISSCC 2017: 238-239 - 2016
- [c4]Giuseppe Desoli, Valeria Tomaselli, Emanuele Plebani, Giulio Urlini, Danilo Pau
, Viviana D'Alto, Tommaso Majo, Fabio De Ambroggi, Thomas Boesch, Surinder Pal Singh, Elio Guidetti, Nitin Chawla:
The Orlando Project: A 28 nm FD-SOI Low Memory Embedded Neural Network ASIC. ACIVS 2016: 217-227 - 2010
- [j1]Pierre Busson, Nitin Chawla, Jérôme Bach, Stéphane Le Tual, Harvinder Singh, Vineet Gupta, Pascal Urard:
A 1 GHz Digital Channel Multiplexer for Satellite Outdoor Unit. IEEE J. Solid State Circuits 45(1): 84-94 (2010)
2000 – 2009
- 2009
- [c3]Pierre Busson, Nitin Chawla, Jérôme Bach, Stéphane Le Tual, Harvinder Singh, Vineet Gupta, Pascal Urard:
A 1GHz digital channel multiplexer for satellite OutDoor Unit based on a 65nm CMOS transceiver. ISSCC 2009: 258-259 - 2008
- [c2]Pascal Urard, Asma Maalej, Roberto Guizzetti, Nitin Chawla:
Leveraging sequential equivalence checking to enable system-level to RTL flows. DAC 2008: 816-821 - [c1]Pascal Urard, L. Paumier, V. Heinrich, N. Raina, Nitin Chawla:
A 360mW 105Mb/s DVB-S2 Compliant Codec based on 64800b LDPC and BCH Codes enabling Satellite-Transmission Portable Devices. ISSCC 2008: 310-311
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last updated on 2024-08-05 20:16 CEST by the dblp team
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