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ORCIDChandan Kumar Sarkar
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2020 – today
- 2022
[j43]Angsuman Sarkar, Chandan Kumar Sarkar, Arezki Benfdila:
Introduction to the special section on State-of-the-art Micro-Nano devices and systems. Comput. Electr. Eng. 100: 108079 (2022)- 2020
- [j42]Avtar Singh
, Saurabh Chaudhury, Manash Chanda, Chandan Kumar Sarkar:
Split gated silicon nanotube FET for bio-sensing applications. IET Circuits Devices Syst. 14(8): 1289-1294 (2020)
2010 – 2019
- 2019
- [j41]Swarnil Roy, Sagar Mukherjee, Arka Dutta, Chandan Kumar Sarkar, Chayanika Bose:
Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application. IET Circuits Devices Syst. 13(3): 337-343 (2019) - [j40]Avtar Singh, Saurabh Chaudhury, Chandan Kumar Pandey, Savitesh Madhulika Sharma, Chandan Kumar Sarkar:
Design and analysis of high k silicon nanotube tunnel FET device. IET Circuits Devices Syst. 13(8): 1305-1310 (2019) - [j39]Sayani Ghosh, Kalyan Koley, Chandan Kumar Sarkar:
Study of circuit performance and non quasi static effect in germanium tunnel FET for different temperatures. Microelectron. J. 90: 204-210 (2019) - 2018
- [j38]Manash Chanda, Sandipta Mal, Akash Mondal, Chandan Kumar Sarkar:
Design and analysis of a logic model for ultra-low power near threshold adiabatic computing. IET Circuits Devices Syst. 12(4): 439-446 (2018) - [j37]Swapan Das, Chandan Kumar Sarkar, Sunipa Roy:
Development of integrated microsystem for hydrogen gas detection. IET Circuits Devices Syst. 12(4): 453-459 (2018) - [j36]Sagar Mukherjee, Arka Dutta, Swarnil Roy, Chandan Kumar Sarkar:
Implementation of Low Power Programmable Flash ADC Using IDUDGMOSFET. IEEE Trans. Circuits Syst. II Express Briefs 65-II(7): 844-848 (2018) - 2017
- [j35]Kalyan Biswas, Angsuman Sarkar, Chandan Kumar Sarkar:
Spacer engineering for performance enhancement of junctionless accumulation-mode bulk FinFETs. IET Circuits Devices Syst. 11(1): 80-88 (2017) - [j34]Manash Chanda, Tanushree Ganguli, Sandipta Mal, Anindita Podder, Chandan Kumar Sarkar:
Energy Efficient Adiabatic Logic Styles in Sub-Threshold Region for Ultra Low Power Application. J. Low Power Electron. 13(3): 472-481 (2017) - 2016
- [j33]Sagar Mukherjee, Kalyan Koley, Arka Dutta, Chandan Kumar Sarkar:
Low-power amplitude modulator for wireless application using underlap double-gate metal-oxide-semiconductor field-effect transistor. IET Circuits Devices Syst. 10(3): 201-208 (2016) - [j32]Sagar Mukherjee, Swarnil Roy, Arka Dutta, Chandan Kumar Sarkar:
Study on effect of back oxide thickness variation in FDSOI MOSFET on analogue circuit performance. IET Circuits Devices Syst. 10(6): 497-503 (2016) - [j31]Kalyan Biswas, Angsuman Sarkar, Chandan Kumar Sarkar:
Impact of Fin Width Scaling on RF/Analog Performance of Junctionless Accumulation-Mode Bulk FinFET. ACM J. Emerg. Technol. Comput. Syst. 12(4): 36:1-36:12 (2016) - [j30]Sanjit Kumar Swain, Arka Dutta, Sarosij Adak, Sudhansu Kumar Pati, Chandan Kumar Sarkar:
Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs. Microelectron. Reliab. 61: 24-29 (2016) - [j29]Arka Dutta, Kalyan Koley, Samar K. Saha, Chandan Kumar Sarkar:
Impact of temperature on linearity and harmonic distortion characteristics of underlapped FinFET. Microelectron. Reliab. 61: 99-105 (2016) - [j28]Sayani Ghosh, Kalyan Koley, Chandan Kumar Sarkar:
Study of process induced variability of germanium-pTFET in analog and RF domain. Microelectron. Reliab. 65: 47-54 (2016) - 2015
- [j27]Manash Chanda, Swapnadip De, Chandan Kumar Sarkar:
Design and Analysis of 32-Bit CLA Using Energy Efficient Adiabatic Logic for Ultra-Low-Power Application. J. Circuits Syst. Comput. 24(10): 1550160:1-1550160:20 (2015) - [j26]Sanjit Kumar Swain, Sarosij Adak, Bikash Sharma, Sudhansu Kumar Pati, Chandan Kumar Sarkar:
Effect of Channel Thickness and Doping Concentration on Sub-Threshold Performance of Graded Channel and Gate Stack DG MOSFETs. J. Low Power Electron. 11(3): 366-372 (2015) - [j25]Atanu Kundu, Arka Dutta, Chandan Kumar Sarkar:
Asymmetric Underlap Dual Material Gate DG-FET for Low Power Analog/RF Applications. J. Low Power Electron. 11(4): 509-516 (2015) - [j24]Sagar Mukherjee, Arka Dutta, Swarnil Roy, Kalyan Koley, Chandan Kumar Sarkar:
Impact of lateral straggle on analog and digital circuit performance using independently driven underlap DG-MOSFET. Microelectron. J. 46(11): 1082-1090 (2015) - [j23]Sayani Ghosh, Kalyan Koley, Chandan Kumar Sarkar:
Impact of the lateral straggle on the Analog and RF performance of TFET. Microelectron. Reliab. 55(2): 326-331 (2015) - [j22]Manash Chanda, Sankalp Jain, Swapnadip De, Chandan Kumar Sarkar:
Implementation of Subthreshold Adiabatic Logic for Ultralow-Power Application. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 2782-2790 (2015) - 2014
- [j21]Atanu Kundu, Arka Dutta, Kalyan Koley, S. Niyogi, Chandan Kumar Sarkar:
RF parameter extraction of underlap DG MOSFETs: a look up table based approach. IET Circuits Devices Syst. 8(6): 554-560 (2014) - [j20]Arka Dutta, Kalyan Koley, Chandan Kumar Sarkar:
Analysis of Harmonic distortion in asymmetric underlap DG-MOSFET with high-k spacer. Microelectron. Reliab. 54(6-7): 1125-1132 (2014) - [j19]Sudhansu Kumar Pati, Kalyan Koley, Arka Dutta, N. Mohankumar, Chandan Kumar Sarkar:
Study of body and oxide thickness variation on analog and RF performance of underlap DG-MOSFETs. Microelectron. Reliab. 54(6-7): 1137-1142 (2014) - [j18]Sanjit Kumar Swain, Sarosij Adak, Sudhansu Kumar Pati, Hemant Pardeshi, Chandan Kumar Sarkar:
Analysis of flicker and thermal noise in p-channel Underlap DG FinFET. Microelectron. Reliab. 54(8): 1549-1554 (2014) - [j17]Atanu Kundu, Kalyan Koley, Arka Dutta, Chandan Kumar Sarkar:
Impact of gate metal work-function engineering for enhancement of subthreshold analog/RF performance of underlap dual material gate DG-FET. Microelectron. Reliab. 54(12): 2717-2722 (2014) - [j16]D. Kayal, Posiba Mostafa, Anup Dandapat, Chandan Kumar Sarkar:
Design of High Performance 8 bit Multiplier using Vedic Multiplication Algorithm with McCMOS Technique. J. Signal Process. Syst. 76(1): 1-9 (2014) - 2013
- [c6]Partha Bhattacharyya, Sunipa Roy, Chandan Kumar Sarkar:
Integration of ZnO nanoflakes with MEMS platform and its application as gas sensor. ICST 2013: 7-10 - [i3]Dipankar Saha, Subhramita Basak, Sagar Mukherjee, Chandan Kumar Sarkar:
A Low-Voltage, Low-Power 4-bit BCD Adder, designed using the Clock Gated Power Gating, and the DVT Scheme. CoRR abs/1309.7163 (2013) - [i2]Dipankar Saha, Subhramita Basak, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar:
Implementation of the Cluster Based Tunable Sleep Transistor Cell Power Gating Technique for a 4x4 Multiplier Circuit. CoRR abs/1310.3203 (2013) - 2012
- [j15]Angsuman Sarkar, Swapnadip De, Anup Dey, Chandan Kumar Sarkar:
1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model. IET Circuits Devices Syst. 6(1): 28-34 (2012) - [j14]Angsuman Sarkar, Aloke Kumar Das, Swapnadip De, Chandan Kumar Sarkar:
Effect of gate engineering in double-gate MOSFETs for analog/RF applications. Microelectron. J. 43(11): 873-882 (2012) - [j13]Srabanti Pandit, Binit Syamal, Chandan Kumar Sarkar:
Modeling of noise for p-channel DG-FinFETs. Microelectron. Reliab. 52(6): 984-988 (2012) - [j12]Kalyan Koley, Binit Syamal, Atanu Kundu, N. Mohankumar, Chandan Kumar Sarkar:
Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions. Microelectron. Reliab. 52(11): 2572-2578 (2012) - [c5]Sagar Mukherjee, Dipankar Saha, Posiba Mostafa, Sayan Chatterjee, Chandan Kumar Sarkar:
A 4-bit Asynchronous Binary Search ADC for Low Power, High Speed Applications. ISED 2012: 28-32 - [c4]Subhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar:
Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme. ISED 2012: 130-134 - [c3]Rituparna Dasgupta, Dipankar Saha, Jagannath Samanta, Sayan Chatterjee, Chandan Kumar Sarkar:
Implementation of a New Offset Generator Block for the Low-Voltage, Low-Power Self Biased Threshold Voltage Extractor Circuit. VDAT 2012: 156-165 - 2011
- [j11]Saurav Chakraborty, Abhijit Mallik, Chandan Kumar Sarkar:
Subthreshold performance of pocket-implanted silicon-on-insulator CMOS devices and circuits for ultra-low-power analogue/mixed-signal applications. IET Circuits Devices Syst. 5(4): 343-350 (2011) - [j10]D. Zade, Soshi Sato, Kuniyuki Kakushima, A. Srivastava, Parhat Ahmet, Kazuo Tsutsui, Akira Nishiyama, Nobuyuki Sugii, Kenji Natori, Takeo Hattori, Chandan Kumar Sarkar, Hiroshi Iwai:
Effects of La2O3 incorporation in HfO2 gated nMOSFETs on low-frequency noise. Microelectron. Reliab. 51(4): 746-750 (2011) - [j9]A. Srivastava, R. K. Nahar, Chandan Kumar Sarkar, W. P. Singh, Y. Malhotra:
Study of hafnium oxide deposited using Dense Plasma Focus machine for film structure and electrical properties as a MOS device. Microelectron. Reliab. 51(4): 751-755 (2011) - [c2]Srabanti Pandit, Chandan Kumar Sarkar:
Modeling the Effect of Gate Fringing and Dopant Redistribution on the Inverse Narrow Width Effect of Narrow Channel Shallow Trench Isolated MOSFETs. VLSI Design 2011: 195-200 - 2010
- [j8]Amrita Chakraborty, Chandan Kumar Sarkar:
Electron transport in two dimensional electron gas formed at the heterojunction of AlxGa(1-x)N/GaN at microwave frequencies. Microelectron. Reliab. 50(7): 965-970 (2010)
2000 – 2009
- 2009
- [j7]A. Srivastava, Partha Sarkar, Chandan Kumar Sarkar:
Study of gate dielectric permittivity variation with different equivalent oxide thickness on channel engineered deep sub-micrometer n-MOSFET device for mixed signal applications. Microelectron. Reliab. 49(4): 365-370 (2009) - [j6]Partha Sarkar, Abhijit Mallik, Chandan Kumar Sarkar:
Study on the performance of sub 100 nm LACLATI MOSFETs for digital application. Microelectron. Reliab. 49(4): 392-396 (2009) - [j5]N. Mohankumar, Binit Syamal, Chandan Kumar Sarkar:
Investigation of novel attributes of single halo dual-material double gate MOSFETs for analog/RF applications. Microelectron. Reliab. 49(12): 1491-1497 (2009) - [i1]Debdatta Kandar, Sourav Dhar, Rabindranath Bera, Chandan Kumar Sarkar:
MIMO Based Multimedia Communication System. CoRR abs/0903.1511 (2009) - 2008
- [j4]Srimanta Baishya, Abhijit Mallik, Chandan Kumar Sarkar:
A threshold voltage model for short-channel MOSFETs taking into account the varying depth of channel depletion layers around the source and drain. Microelectron. Reliab. 48(1): 17-22 (2008) - 2007
- [j3]M. Ganguly, Chandan Kumar Sarkar:
Realization of quantum dot Boolean logic gate for image processing applications. J. Electronic Imaging 16(2): 023003 (2007) - [j2]Partha Sarkar, Abhijit Mallik, Chandan Kumar Sarkar:
Performance comparison of channel engineered deep sub-micrometer pseudo SOI n-MOSFETs. Microelectron. Reliab. 47(6): 953-958 (2007) - [c1]Srimoyee Sen, Urmimala Roy, Chaitanya Kshirsagar, Navakanta Bhat, Chandan Kumar Sarkar:
Circuit prospects of DGFET: Variable gain differential amplifier an a schmitt trigger with adjustable hysteresis. VLSI-SoC 2007: 280-283 - 2006
- [j1]S. Shrestha, Chandan Kumar Sarkar:
Comparative studies on electronic transport due to the reduced dimensionality at the heterojunctions of GaAs/A1xGa(1-x)As and GaxIn(1-x)As/InP systems at low temperatures. Microelectron. J. 37(8): 735-741 (2006)
Coauthor Index
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