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ORCIDRalf Wollowski
Person information
- affiliation: Hasso Plattner Institute, Potsdam, Germany
- affiliation: University of Kaiserslautern, Department of Electrical Engineering, Germany
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2010 – 2019
- 2017
[c12]Norman Kluge, Ralf Wollowski:
Data path optimisation and delay matching for asynchronous bundled-data balsa circuits. ICCAD 2017: 408-415- 2016
- [c11]Norman Kluge, Ralf Wollowski:
Optimising Bundled-Data Balsa Circuits. ASYNC 2016: 99-106 - 2011
- [j3]Dominic Wist, M. Schaefer, Walter Vogler, Ralf Wollowski:
Signal transition graph decomposition: internal communication for speed independent circuit implementation. IET Comput. Digit. Tech. 5(6): 440-451 (2011) - [c10]Dominic Wist, Walter Vogler, Ralf Wollowski:
STG Decomposition: Partitioning Heuristics. ACSD 2011: 141-150 - 2010
- [c9]Dominic Wist, Mark Schäfer, Walter Vogler, Ralf Wollowski:
STG Decomposition: Internal Communication for SI Implementability. ACSD 2010: 13-23
2000 – 2009
- 2009
- [j2]Victor Khomenko, Mark Schäfer, Walter Vogler, Ralf Wollowski:
STG decomposition strategies in combination with unfolding. Acta Informatica 46(6): 433-474 (2009) - [j1]Dominic Wist, Ralf Wollowski, Mark Schäfer, Walter Vogler:
Avoiding Irreducible CSC Conflicts by Internal Communication. Fundam. Informaticae 95(1): 1-29 (2009) - [c8]Mark Schäfer, Dominic Wist, Ralf Wollowski:
DESIJ--Enabling Decomposition-Based Synthesis of Complex Asynchronous Controllers. ACSD 2009: 186-190 - 2008
- [c7]Mark Schäfer, Walter Vogler, Dominic Wist, Ralf Wollowski:
Avoiding irreducible CSC conflicts by internal communication. ACSD 2008: 3-12 - 2006
- [c6]Mark Schäfer, Walter Vogler, Ralf Wollowski, Victor Khomenko:
Strategies for Optimised STG Decomposition. ACSD 2006: 123-132 - 2002
- [c5]Walter Vogler, Ralf Wollowski:
Decomposition in Asynchronous Circuit Design. Concurrency and Hardware Design 2002: 152-190 - [c4]Walter Vogler, Ralf Wollowski:
Decomposition in Asynchronous Circuit Design. FSTTCS 2002: 336-347 - 2000
- [c3]Jochen Beister, Gernot Eckstein, Ralf Wollowski:
CASCADE: A Tool Kernel Supporting a Comprehensive Design Method for Asynchronous Controllers. ICATPN 2000: 445-454
1990 – 1999
- 1999
- [c2]Jochen Beister, Gernot Eckstein, Ralf Wollowski:
From STG to Extended-Burst-Mode Machines. ASYNC 1999: 145- - 1997
- [b1]Ralf Wollowski:
Entwurfsorientierte Petrinetz-Modellierung des Schnittstellen-Sollverhaltens asynchroner Schaltwerksverbünde. University of Kaiserslautern, Shaker 1997, ISBN 3-8265-2898-0, pp. 1-416 - 1992
- [c1]Jochen Beister, Ralf Wollowski:
Controller Implementation by Communicating Asynchronous Sequential Circuits Generated from a Petri Net Specification of Required Behavior. Synthesis for Control Dominated Circuits 1992: 103-115
Coauthor Index
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