An overclocking clock software PUF circuit with no additional hardware resource overhead based on video coding circuit - Tengfei Yuan; Pengjun Wang; Yuejun Zhang; Ziyu Zhou (Integr., 2025)

A 578-TOPS/W RRAM-Based Binary Convolutional Neural Network Macro for Tiny AI Edge Devices - Lixun Wang; Yuejun Zhang; Pengjun Wang; Jianguo Yang; Huihong Zhang; Gang Li; Qikang Li (IEEE Trans. Very Large Scale Integr. Syst., 2025)

An efficient ANN SoC for detecting Alzheimer's disease based on recurrent computing - Zhikang Chen; Yuejun Zhang; Ziyu Zhou; Lixun Wang; Huihong Zhang; Pengjun Wang; Jinyan Xu (Comput. Biol. Medicine, 2024)

Lightweight skin cancer detection IP hardware implementation using cycle expansion and optimal computation arrays methods - Qikang Li; Yuejun Zhang; Lixun Wang; Huihong Zhang; Penjun Wang; Minghong Gu; Suling Xu (Comput. Biol. Medicine, 2024)

High-performance and low-power decoder circuits for SRAMs using mixed-logic scheme - Donghao Xia; Yuejun Zhang; Yuanxin Tian; Mengfan Xu; Liang Wen (Integr., 2024)

Novel crosstalk circuit design for high density logic applications - Huihong Zhang; Zhiwei Zhao; Hongshuai Wei; Yuejun Zhang; Pengjun Wang (Microelectron. J., 2024)

Distance optimization KNN and EMD based lightweight hardware IP core design for EEG epilepsy detection - Xuanxu Chen; Yuejun Zhang; Guangpeng Ai; Lixun Wang; Huihong Zhang; Xiangyu Li; Pengjun Wang (Microelectron. J., 2024)

SI PUF: An SRAM and Inverter-Based PUF With a Bit Error Rate of 0.0053% and 0.073/0.042 pJ/bit - Li Ni; Pengjun Wang; Yuejun Zhang; Xiangyu Li; Gang Li; Lin Ding; Jiliang Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Physical Unclonable Function Feature Extraction Technique for Oil Paintings Copyright Protection - Chengjie Wang; Yuejun Zhang; Shengjie Fu; Lixun Wang (IEEE International Test Conference in Asia, ITC-Asia 2024, Changsha, China, August 18-20, 2024, 2024)

A Lightweight Folded Keccak-Based SHA-3 for Resource-Constrained Embedded Security - Siqi Xiong; Dongsheng Liu; Jiahao Lu; Aobo Li; Tianze Huang; Chenjun Yang; Ang Hu; Yuejun Zhang (17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2024, Kuala Lumpur, Malaysia, December 16-19, 2024, 2024)

A lightweight convolutional neural network hardware implementation for wearable heart rate anomaly detection - Minghong Gu; Yuejun Zhang; Yongzhong Wen; Guangpeng Ai; Huihong Zhang; Pengjun Wang; Guoqing Wang (Comput. Biol. Medicine, 2023)

PI PUF: A Processor-Intrinsic PUF for IoT - Li Ni; Pengjun Wang; Yuejun Zhang; Gang Li; Lin Ding; Jiliang Zhang (Comput. Electr. Eng., 2023)

A 7-nm-Based 5R4W High-Timing Reliability Regfile Circuit - Wanlong Zhao; Yuejun Zhang; Liang Wen; Pengjun Wang (IET Circuits Devices Syst., 2023)

Convolutional neural network-based lightweight hardware IP core design for EEG epilepsy prediction - Guangpeng Ai; Yuejun Zhang; Yongzhong Wen; Minghong Gu; Huihong Zhang; Pengjun Wang (Microelectron. J., 2023)

Profiling side-channel attacks based on CNN model fusion - Lei Ni; Pengjun Wang; Yuejun Zhang; Huihong Zhang; Xiangyu Li; Li Ni; Jie Lv; Weifang Zheng (Microelectron. J., 2023)

Design of a Novel Self-Test-on-Chip Interface ASIC for Capacitive Accelerometers - Xiangyu Li; Pengjun Wang; Gang Li; Yuejun Zhang (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Highly Reliable Physical Unclonable Function Based on ZnO-SnO2 Gas Sensor - Haonan He; Pengjun Wang; Xiangyu Li; Li Ni; Yuejun Zhang (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

Ternary Multiply-Accumulate Circuit Based on Domino Structure - Hanyu Shi; Yuejun Zhang; Huihong Zhang; Qikang Li; Pengjun Wang (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

An Architecture of a Single-Event Tolerant D Flip-flop Using Full-Custom Design in 28nm Process - Yuanxin Tian; Yuejun Zhang; Huihong Zhang; Liang Wen; Pengjun Wang; Zhiyi Li (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

High-Performance Rejection Sampling Hardware Circuit Design for Kyber - Yang Wang; Huihong Zhang; Yuejun Zhang; Hongshuai Wei; Pengjun Wang; Tengfei Yuan; Chengjie Wang (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

An Efficient Hash Computing Unit for Kyber Algorithm - Hongshuai Wei; Yuejun Zhang; Huihong Zhang; Yang Wang; Tengfei Yuan; Chengjie Wang; Pengjun Wang (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

Full-custom Design of Improved Carry Adder Circuit for CLBs - Mengfan Xu; Yuejun Zhang; Huihong Zhang; Liang Wen; Tengfei Yuan; Pengjun Wang; Zhiyi Li (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

A 7nm-Based Decodable Self-Resetting Regfile Circuit - Wanlong Zhao; Yuejun Zhang; Mingze Ren; Liang Wen; Pengjun Wang (15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, 2023)

A 65nm/0.448 mW EEG processor with parallel architecture SVM and lifting wavelet transform for high-performance and low-power epilepsy detection - Yongzhong Wen; Yuejun Zhang; Liang Wen; Haojie Cao; Guangpeng Ai; Minghong Gu; Pengjun Wang; Huiling Chen (Comput. Biol. Medicine, 2022)

TVD-PB logic circuit based on camouflaging circuit for IoT security - Yuejun Zhang; Qiufeng Wu; Pengjun Wang; Liang Wen; Zhicun Luan; Chongyan Gu (IET Circuits Devices Syst., 2022)

An ACF - Li Ni; Pengjun Wang; Yuejun Zhang; Jia Chen; Huihong Zhang; Youyi Zhuang (Microelectron. J., 2022)

A configurable detection chip with \(±\)0.6% Inaccuracy for liquid conductivity using dual-frequency sinusoidal signal technique in 65 nm CMOS - Ye Lin; Yuejun Zhang; Shengjie Fu; Huihong Zhang; Pengjun Wang (Microelectron. J., 2022)

A stable voltage island-driven floorplanning with fixed-outline constraint for low power SoC - Shimin Du; Runping Yang; Yuejun Zhang; Yu Shenglu (Microelectron. J., 2022)

A 28 nm 512 Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for high density and low BER cryptographic key in IoT devices - Jianguo Yang; Ruijun Lin; Keji Zhou; Yuejun Zhang; Xiaoyong Xue; Hangbing Lv (Microelectron. J., 2022)

Orthogonal obfuscation based key management for multiple IP protection - Yuejun Zhang; Jiawei Wang; Pengjun Wang; Xiaoyong Xue; Xiaoyang Zeng (Integr., 2021)

A 0.004% resolution & SAT - Yuejun Zhang; Haiming Zhang; Pengjun Wang; Qiufeng Wu; Gang Li (Integr., 2021)

SPUF design based on Camellia encryption algorithm - Jia Chen; Pengjun Wang; Yuejun Zhang; Huihong Zhang (Microelectron. J., 2021)

A Multimode Configurable Physically Unclonable Function With Bit-Instability-Screening and Power-Gating Strategies - Gang Li; Pengjun Wang; Xuejiao Ma; Yijian Shi; Bo Chen; Yuejun Zhang (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A ReRAM-based 10T2R SRAM Using Power-off Recovery Function for Reducing Power - Sheng Dai; Yuejun Zhang; Huihong Zhang; Jing Li; Ye Lin (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

A Multi-conductance States Memristor-based CNN Circuit Using Quantization Method for Digital Recognition - Zhecheng Guo; Yuejun Zhang; Suling Xu; Zhixin Wu; Wanlong Zhao (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

A 65nm Reliable Near-Subthreshold Standard Cells Design Using Schmitt Trigger - Jinliang Han; Yongzhong Wen; Yuejun Zhang; Pengjun Wang; Huihong Zhang (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

A HfO2 Ferroelectric Capacitor based 10T2C High Reliability Non-Volatile SRAM for Low Power IoT Applications - Jing Li; Yulin Zhao; Bo Peng; Xuanzhi Liu; Qiao Hu; Sheng Dai; Jianguo Yang; Yuejun Zhang (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

A String-in-string-out 256 Bits eFuse Using Full-custom Design in 55nm Process - Yang Li; Yuejun Zhang; Steve Yang; Shimin Du; Ye Lin (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

A Reliable Multi-information Entropy Glitch PUF Using Schmitt Trigger Sampling Method for IoT Security - Li Ni; Pengjun Wang; Yuejun Zhang; Jia Chen; Liwei Li; Huihong Zhang (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States - Zhixin Wu; Yuejun Zhang; Shimin Du; Zhecheng Guo; Wanlong Zhao (14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, 2021)

65 nm sub-threshold logic standard cell library using quasi-Schmitt-trigger design scheme and inverse narrow width effect aware sizing - Liang Wen; Longmei Nan; Jing Zhang; Chunning Meng; Yan Lu; Shiqian Qi; Jianping Lv; Yuejun Zhang (IET Circuits Devices Syst., 2020)

A Low Cost MST-FSM Obfuscation Method for Hardware IP Protection - Yuejun Zhang; Zhao Pan; Pengjun Wang; Xiaowei Zhang (J. Circuits Syst. Comput., 2020)

Radiation-Hardened, Read-Disturbance-Free New-Quatro-10T Memory Cell for Aerospace Applications - Liang Wen; Yuejun Zhang; Pengjun Wang (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A 215-F\(^2\) Bistable Physically Unclonable Function With an ACF of <0.005 and a Native Bit Instability of 2.05% in 65-nm CMOS Process - Gang Li; Pengjun Wang; Xuejiao Ma; Jiana Lian; Junpeng Shu; Yuejun Zhang (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Design of anti-key leakage camouflage gate circuit for reverse engineering based on dummy vias - Liwei Li; Pengjun Wang; Yuejun Zhang (Microelectron. J., 2019)

A 0.1-pJ/b and ACF <0.04 Multiple-Valued PUF for Chip Identification Using Bit-Line Sharing Strategy in 65-nm CMOS - Yuejun Zhang; Zhao Pan; Pengjun Wang; Dailu Ding; Qiaoyan Yu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Column-Selection-Enabled 10T SRAM Utilizing Shared Diff-VDD Write and Dropped-VDD Read for Power Reduction - Liang Wen; Yuejun Zhang; Xiaoyang Zeng (IEEE Trans. Very Large Scale Integr. Syst., 2019)

An Orthogonal Algorithm for Key Management in Hardware Obfuscation - Jiawei Wang; Yuejun Zhang; Pengjun Wang; Zhicun Luan; Xiaoyong Xue; Xiaoyang Zeng; Qiaoyan Yu (Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2019, Xi'an, China, December 16-17, 2019, 2019)

A 96kb, 0.36V, Energy-Efficient 8T-SRAM with Column-Selection and Shared Buffer-Foot Techniques for EEG Processor - Liang Wen; Yu Liu; Wei Mo; Jing Zhang; Shiqian Qi; Jianping Lv; Yuejun Zhang (13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, 2019)

A High-speed Dynamic Domino Full Adder Based on DICG Positive Feedback - Xiaotian Zhang; Pengjun Wang; Yunfei Yu; Yuejun Zhang; Shunxin Ye (13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, 2019)

Design of Aging Detection Sensor Based on Voltage Comparison - Haiming Zhang; Pengjun Wang; Yuejun Zhang; Yunfei Yu (13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, 2019)

Design of Crosstalk NAND Gate Circuit Based on Interconnect Coupling Capacitance - Zhiwei Zhao; Yuejun Zhang; Pengjun Wang; Huihong Zhang; Zhang Weishan (13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, 2019)

A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key - Xiaoyong Xue; Jianguo Yang; Yuejun Zhang; Mingyu Wang; Hangbing Lv; Xiaoyang Zeng; Ming Liu (IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019, 2019)

An ultra-low power multiplier using multi-valued adiabatic logic in 658239nm CMOS process - Yuejun Zhang; Dailu Ding; Zhao Pan; Pengjun Wang; Qiaoyan Yu (Microelectron. J., 2018)

Design of Delayed Ternary PUF Circuit Based on CNFET - Zhengyang He; Kai Ren; Jiayan Chen; Xinyi Dai; Zhao Pan; Yuejun Zhang (24th Asia-Pacific Conference on Communications, APCC 2018, Ningbo, China, November 12-14, 2018, 2018)

A multi-port low-power current mode PUF using MOSFET current-division deviation in 65 nm technology - Gang Li; Pengjun Wang; Yuejun Zhang; Huihong Zhang (Microelectron. J., 2017)

A highly reliable lightweight PUF circuit with temperature and voltage compensated for secure chip identification - Gang Li; Pengjun Wang; Yuejun Zhang (12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017, 2017)

Design of ternary pulsed reversible counter based on CNFET - Yaopeng Kang; Pengjun Wang; Yuejun Zhang; Gang Li (12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017, 2017)

DSD: A Dynamic State-Deflection Method for Gate-Level Netlist Obfuscation - Jaya Dofe; Yuejun Zhang; Qiaoyan Yu (IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016, 2016)

Operating load based real-time rolling grey forecasting for machine health prognosis in dynamic maintenance schedule - Tangbin Xia; Xiaoning Jin; Lifeng Xi; Yuejun Zhang; Jun Ni (J. Intell. Manuf., 2015)

Design and Analysis of Highly Energy/Area-Efficient Multiported Register Files With Read Word-Line Sharing Strategy in 65-nm CMOS Process - Xiaoyang Zeng; Yi Li; Yuejun Zhang; Shujie Tan; Jun Han; Xingxing Zhang; Zhang Zhang; Xu Cheng; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Design of power-up and arbiter hybrid physical unclonable functions in 65nm CMOS - Yuejun Zhang; Pengjun Wang; Gang Li; Haoyu Qian; Xiaomin Zheng (2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015, 2015)

An area-efficient dual replica-bitline delay technique for process-variation-tolerant low voltage SRAM sense amplifier timing - Yi Li; Liang Wen; Yuejun Zhang; Xu Cheng; Jun Han; Zhiyi Yu; Xiaoyang Zeng (IEICE Electron. Express, 2014)

Design of threshold dominant delay Physical Unclonable Functions in 65nm CMOS - Yuejun Zhang; Pengjun Wang; Jianrui Li; Gang Li (2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014, 2014)

Architecture and Physical Implementation of Reconfigurable Multi-Port Physical Unclonable Functions in 65 nm CMOS - Pengjun Wang; Yuejun Zhang; Jun Han; Zhiyi Yu; Yibo Fan; Zhang Zhang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

Highly stable data SRAM-PUF in 65nm CMOS process - Xuelong Zhang; Pengjun Wang; Yuejun Zhang (IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013, 2013)

Design of a high information-density multiple valued 2-read 1-write register file - Yuejun Zhang; Pengjun Wang; Baoyu Xiong; Zhiyi Yu (IEICE Electron. Express, 2012)

A 64 exttimes32bit 4-read 2-write low power and area efficient register file in 65nm CMOS - Jun Han; Xingxing Zhang; Yi Li; Baoyu Xiong; Yuejun Zhang; Zhang Zhang; Zhiyi Yu; Xu Cheng; Xiaoyang Zeng (IEICE Electron. Express, 2012)

Design of resistant DPA three-valued counter based on SABL - Yuejun Zhang; Pengjun Wang; Lipeng Hao (2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011, 2011)

An Implementation of the Agency Architecture in Educational Robotics - Yuejun Zhang; Kinshuk; Ilkka Jormanainen; Erkki Sutinen (The 8th IEEE International Conference on Advanced Learning Technologies, ICALT 2008, Santander, Cantabria, Spain, July 1-5, 2008, 2008)

Pedagogical Agents for Teacher Intervention in Educational Robotics Classes: Implementation Issues - Ilkka Jormanainen; Yuejun Zhang; Kinshuk; Erkki Sutinen (DIGITEL 2007, The First IEEE International Workshop on Digital Game and Intelligent Toy Enhanced Learning, Proceedings, 26-28 March 2007, Jhongli, Taiwan, 2007)

Agency Architecture for Teacher Intervention in Robotics Classes - Ilkka Jormanainen; Yuejun Zhang; Erkki Sutinen; Kinshuk (Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, ICALT 2006, Kerkrade, The Netherlands, July 5-7, 2006, 2006)

Using Agents for Enhancing Learning Effects in an Advanced Discussion Forum - Yuejun Zhang; Kinshuk; Øyvind Smestad; Jingyu Yang; Lynn Jeffrey (Learning by Effective Utilization of Technologies: Facilitating Intercultural Understanding, Proceeding of the 14th International Conference on Computers in Education, ICCE 2006, November 30 - December 4, 2006, Beijing, China, 2006)

Implementation of Intelligent Agents with Mobility in Educational Robotics Settings - Ilkka Jormanainen; Chiara Moroni; Yuejun Zhang; Kinshuk; Erkki Sutinen (4th IEEE International Workshop on Wireless and Mobile Technologies in Education, WMTE 2006, Athens, Greece, November 16-17, 2006, 2006)

An Open-ended Framework for Learning Object Metadata Interchange - Yuejun Zhang; Kinshuk; Taiyu Lin (Towards Sustainable and Scalable Educational Innovations Informed by the Learning Sciences - Sharing Good Practices of Research, Experimentation and Innovation, Proceedings of the 13th International Conference on Computers in Education, ICCE 2005, 28 November - 30 December 2005, Singapore, 2005)