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Thomas A. Hughes

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affiliation: IBM Corp., Research Triangle Park, NC, USA
affiliation (former): North Carolina State University, Raleigh, NC, USA

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1990 – 1999

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1994
[j3]
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C. Thomas Gray, Wentai Liu, Wilhelmus A. M. Van Noije, Thomas A. Hughes, Ralph K. Cavin III:
A sampling technique and its CMOS implementation with 1 Gb/s bandwidth and 25 ps resolution. IEEE J. Solid State Circuits 29(3): 340-349 (1994)
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Wentai Liu, C. Thomas Gray, David Fan, William J. Farlow, Thomas A. Hughes, Ralph K. Cavin III:
A 250-MHz wave pipelined adder in 2-μm CMOS. IEEE J. Solid State Circuits 29(9): 1117-1128 (1994)
1993
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Matthias F. M. Stallmann, Thomas A. Hughes:
Fast Algorithms for One-Dimensional Compaction with Jog Insertion. WADS 1993: 589-600
1991
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C. Thomas Gray, Thomas A. Hughes, Sanjay Arora, Wentai Liu, Ralph K. Cavin III:
Theoretical and Practical Issues in CMOS Wave Pipelining. VLSI 1991: 397-409
1990
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Matthias F. M. Stallmann, Thomas A. Hughes, Wentai Liu:
Unconstrained via minimization for topological multilayer routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(9): 970-980 (1990)
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C. Thomas Gray, Wentai Liu, Thomas A. Hughes, Ralph K. Cavin III:
The design of a high-performance scalable architecture for image processing applications. ASAP 1990: 722-733
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C. Thomas Gray, Wentai Liu, Thomas A. Hughes, Ralph K. Cavin III, Su-Shing Chen:
P³A: a partitionable parallel/pipeline architecture for real-time image processing. ICPR (2) 1990: 529-531

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