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2020 – today
- 2020
[j3]Tomasz Borejko, Krzysztof Marcinek
, Krzysztof Siwiec, Pawel Narczyk, Adam Borkowski, Igor Butryn, Arkadiusz W. Luczyk, Daniel Pietron, Maciej Plasota, Szymon Reszewicz, Lukasz Wiechowski, Witold A. Pleskacz:
NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. Sensors 20(4): 1069 (2020)- [j2]Tomasz Borejko, Krzysztof Marcinek, Krzysztof Siwiec, Pawel Narczyk, Adam Borkowski, Igor Butryn, Arkadiusz W. Luczyk, Daniel Pietron, Maciej Plasota, Szymon Reszewicz, Lukasz Wiechowski, Witold A. Pleskacz:
Erratum: Borejko, T., et al. NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. Sensors 2020, 20, 1069. Sensors 20(19): 5544 (2020)
2010 – 2019
- 2019
- [c18]Adam Borkowski, Tomasz Borejko, Witold A. Pleskacz:
DC/DC Buck Converter with Build-in Tuned Sawtooth Wave Generator Using CMOS Technology. MIXDES 2019: 196-199 - 2017
- [c17]Daniel Pietron, Tomasz Borejko, Krzysztof Siwiec, Witold A. Pleskacz:
Importance of on-chip inductor modeling in radio frequency integrated circuits. MIXDES 2017: 398-403 - 2016
- [c16]Krzysztof Siwiec, Krzysztof Marcinek, Piotr Boguszewicz, Tomasz Borejko, Aleh Halauko, Adam Jarosz, Jakub Kopanski, Ewa Kurjata-Pfitzner, Pawel Narczyk, Maciej Plasota, Andrzej Wielgus, Witold A. Pleskacz:
BioSoC: Highly integrated System-on-Chip for health monitoring. DDECS 2016: 102-107 - [c15]Cezary Kolacinski, Jerzy Wasowski, Andrzej Szymanski, Adam Jarosz, Ewa Kurjata-Pfitzner, Tomasz Borejko, Krzysztof Siwiec, Witold A. Pleskacz:
Dedicated chip for pulse oximetry measurements. EWDTS 2016: 1-4 - [c14]Cezary Kolacinski, Andrzej Szymanski, Adam Jarosz, Ewa Kurjata-Pfitzner, Jerzy Wasowski, Tomasz Borejko, Krzysztof Siwiec, Witold A. Pleskacz:
The integrated transmitter and receiver modules for pulse oximeter system. MIXDES 2016: 243-248 - 2015
- [c13]Krzysztof Siwiec, Krzysztof Marcinek, Tomasz Borejko, Adam Jarosz, Jakub Kopanski, Ewa Kurjata-Pfitzner, Pawel Narczyk, Maciej Plasota, Andrzej Wielgus, Witold A. Pleskacz:
A CMOS system-on-chip for physiological parameters acquisition, processing and monitoring. MIXDES 2015: 37-42 - [c12]Mariusz Derlecki, Tomasz Borejko, Witold A. Pleskacz:
IF polyphase filter design and calibration with back-gate biasing in 28 nm FD-SOI technology. MIXDES 2015: 334-338 - [c11]Aleh Halauko, Tomasz Borejko, Witold A. Pleskacz:
Low voltage LNA implementations in 28 nm FD-SOI technology for GNSS applications. MIXDES 2015: 354-358 - 2012
- [c10]Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz:
LC-VCO design automation tool for nanometer CMOS technology. DDECS 2012: 68-73 - 2011
- [c9]Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz:
PVT tolerant LC-VCO in 90 nm CMOS technology for GPS/Galileo applications. DDECS 2011: 29-34 - [c8]Michal Lukaszewicz, Tomasz Borejko, Witold A. Pleskacz:
A resistorless current reference source for 65 nm CMOS technology with low sensitivity to process, supply voltage and temperature variations. DDECS 2011: 75-79 - [c7]Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz:
CAD tool for PLL Design. DDECS 2011: 283-286 - 2010
- [c6]Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz:
A comparison of low voltage LNA architectures designed for multistandard GNSS in two 90 nm CMOS technologies. DDECS 2010: 213-216
2000 – 2009
- 2009
- [c5]Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz:
Low voltage LNA implementations in 90 nm CMOS technology for multistandard GNSS. DDECS 2009: 78-83 - 2008
- [j1]Witold A. Pleskacz, Viera Stopjaková, Tomasz Borejko, Artur Jutman, Andrzej Walkanis:
DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits. IEEE Trans. Ind. Electron. 55(6): 2405-2415 (2008) - [c4]Tomasz Borejko, Witold A. Pleskacz:
A Resistorless Voltage Reference Source for 90 nm CMOS Technology with Low Sensitivity to Process and Temperature Variations. DDECS 2008: 38-43 - [c3]Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjaková:
Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology. DDECS 2008: 259-262 - 2006
- [c2]Witold A. Pleskacz, Tomasz Borejko, Andrzej Walkanis, Viera Stopjaková, Artur Jutman, Raimund Ubar:
DefSim: CMOS Defects on Chip for Research and Education. LATW 2006: 74-79 - 2002
- [c1]Witold A. Pleskacz, Tomasz Borejko, Wieslaw Kuzmicz:
CMOS Standard Cells Characterization for IDDQ Testing. DFT 2002: 390-398
Coauthor Index
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