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ORCIDJin-Gyun Chung
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2020 – today
- 2024
[j28]Shi-Yi Jin
, Dong-Hyun Seo, Yeon-Jin Kim, Yong-Eun Kim, Samuel Woo, Jin-Gyun Chung:
Single-Frame-Based Data Compression for CAN Security. Inf. 15(3): 132 (2024)- 2023
- [j27]Yousik Lee, Yong-Eun Kim, Jin-Gyun Chung, Samuel Woo:
Real Time Perfect Bit Modification Attack on In-Vehicle CAN. IEEE Trans. Veh. Technol. 72(12): 15154-15171 (2023) - 2022
- [j26]Yujing Wu, Jinze Li, Yinan Xu, Jin-Gyun Chung, Yilin Dai, Yihu Xu:
Dynamic Rearrangement Compression Algorithm for Intelligent Connected Vehicles. IEEE Trans. Veh. Technol. 71(10): 10350-10360 (2022) - [c40]Aoran Wang, Jie Fang, Yinan Xu, Yihu Xu, Yubing Wang, Yujing Wu, Jin-Gyun Chung:
Anomaly information detection and fault tolerance control method for CAN-FD bus network. ISOCC 2022: 308-309 - 2021
- [j25]Yeon-Jin Kim, Samuel Woo, Jin-Gyun Chung:
Triple ID Flexible MAC for Can Security Improvement. IEEE Access 9: 126388-126399 (2021) - [c39]Shiyi Jin, Jin-Gyun Chung, Yinan Xu:
Signature-Based Intrusion Detection System (IDS) for In-Vehicle CAN Bus Network. ISCAS 2021: 1-5 - [c38]Shiyi Jin, Yeonjin Kim, Jin-Gyun Chung, Yongen Kim:
CAN Data Compression Based on Sorting and Mapping Method. ISOCC 2021: 327-328 - 2020
- [c37]Yeon-Jin Kim, Jin-Gyun Chung:
Variable Length MAC for CAN Security Protocol. ISOCC 2020: 272-273 - [c36]Do-Yeon Hwang, Yeon-Jin Kim, Jin-Gyun Chung:
CAN Security Protocol Using Modified MAC. ISOCC 2020: 308-309
2010 – 2019
- 2019
- [c35]Ho-Yun Lee, Yeon-Jin Kim, Do-Yeon Hwang, Jin-Gyun Chung:
Peak Variation Detection Using Variable Length Moving Average Filter for Defects Inspection Systems. ISOCC 2019: 231-232 - 2018
- [c34]Yeon-Jin Kim, Ho-Yun Lee, Jin-Gyun Chung:
4-Bit Data Arrangement Algorithm for CAN Compression. ISOCC 2018: 216-217 - 2017
- [j24]Yeon-Jin Kim, In-Gul Jang, Kyung-Ju Cho, Jin-Gyun Chung:
Low-latency and memory-efficient SDF IFFT processor design for 3GPP LTE. IEICE Electron. Express 14(12): 20170395 (2017) - [j23]Yujing Wu, Jin-Gyun Chung:
An Improved Controller Area Network Data-Reduction Algorithm for In-Vehicle Networks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(2): 346-352 (2017) - [c33]Yeon-Jin Kim, Yang Zou, Jin-Gyun Chung:
Improved CAN compression algorithm by data reordering. ISOCC 2017: 264-265 - 2016
- [j22]Md. Hashem Ali Khan, Jin-Gyun Chung, Moon Ho Lee:
Downlink performance of cell edge using cooperative BS for multicell cellular network. EURASIP J. Wirel. Commun. Netw. 2016: 56 (2016) - [c32]Zhe-Yan Piao, Yeon-Jin Kim, Jin-Gyun Chung:
Efficient successive cancellation decoder for polar codes based on frozen bits. APCCAS 2016: 585-587 - [c31]Yeon-Jin Kim, Zhe-Yan Piao, Jin-Gyun Chung, In-Gul Jang, Kyung-Ju Cho:
Low latency IFFT design for 3GPP LTE. ISOCC 2016: 69-70 - [c30]Zhe-Yan Piao, Jin-Gyun Chung:
Design of low latency successive cancellation decoder for polar codes. ISOCC 2016: 293-294 - 2015
- [j21]Md. Hashem Ali Khan, Jin-Gyun Chung, Moon Lee:
Lattice reduction aided with block diagonalization for multiuser MIMO systems. EURASIP J. Wirel. Commun. Netw. 2015: 254 (2015) - [j20]Yujing Wu, Jin-Gyun Chung:
Efficient controller area network data compression for automobile applications. Frontiers Inf. Technol. Electron. Eng. 16(1): 70-78 (2015) - [j19]Md. Abdul Latif Sarker, Moon Ho Lee, Jin-Gyun Chung:
ISI Free Channel Equalization for Future 5G Mobile Terminal Using Bio-inspired Neural Networks. Wirel. Pers. Commun. 83(4): 2899-2923 (2015) - [j18]Md. Hashem Ali Khan, TaeChol Shin, Moon Ho Lee, Jin-Gyun Chung:
Signal Constellations of Quasi-Orthogonal Space-Time Codes for MIMO Systems. Wirel. Pers. Commun. 85(4): 2003-2019 (2015) - [c29]Tae-Sun Kim, Myung Hoon Sunwoo, Jin-Gyun Chung:
Hierarchical fast mode decision algorithm for intra prediction in HEVC. ISCAS 2015: 2792-2795 - 2014
- [j17]Md. Hashem Ali Khan, K. M. Cho, Moon Lee, Jin-Gyun Chung:
A simple block diagonal precoding for multi-user MIMO broadcast channels. EURASIP J. Wirel. Commun. Netw. 2014: 95 (2014) - [j16]Ho-Yun Lee, Jun-Ho Kim, In-Gul Jang, Kyung-Ju Cho, Jin-Gyun Chung:
Memory efficient DIT-based SDF IFFT for OFDM systems. IEICE Electron. Express 11(5): 20140010 (2014) - [c28]Yujing Wu, Zhe-Yan Piao, Jun-Ho Kim, Jin-Gyun Chung:
CAN compression using signal rearrangement. APCCAS 2014: 655-658 - [c27]Yujing Wu, Jin-Gyun Chung, Myung Hoon Sunwoo:
Design and implementation of CAN data compression algorithm. ISCAS 2014: 582-585 - 2013
- [j15]In-Gul Jang, Kyung-Ju Cho, Hwan-Yong Kim, Jin-Gyun Chung:
Memory efficient IFFT design for OFDM-based applications. IEICE Electron. Express 10(21): 20130530 (2013) - 2012
- [j14]In-Gul Jang, Kyung-Ju Cho, Yong-Eun Kim, Jin-Gyun Chung:
Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications. IEICE Trans. Commun. 95-B(6): 2059-2064 (2012) - [c26]Yinan Xu, Chunlei Zhao, Xi Chen, Weiwen Deng, Jin-Gyun Chung:
Integrated protocol-operation-controller design based on FlexRay communication protocol. IC-NIDC 2012: 199-203 - [c25]Ze-Hua Dong, Zhe-Yan Piao, In-Gul Jang, Jin-Gyun Chung, Chul-Dong Lee:
Design of FlexRay-MOST gateway using static segments and control messages. ISCAS 2012: 536-539 - [c24]Hyung-Gu Park, HongJin Kim, JooHyung Lee, Kang-Yoon Lee, Jin-Gyun Chung:
Low power multi-channel capacitive touch sensing unit using capacitor to time conversion method. ISCAS 2012: 2003-2006 - [c23]In-Gul Jang, Dae-Ho Kim, Ho-Yun Yi, Jin-Gyun Chung, Kyung-Ju Cho:
Efficient IFFT architecture design for OFDM applications. ISOCC 2012: 231-234 - 2011
- [c22]Kyung-Ju Cho, Jin-Gyun Chung, Hwan-Yong Kim, Gwang-Jun Kim, Dae-Ik Kim, Yong-Kab Kim:
Fixed-Width Modified Booth Multiplier Design Based on Error Bound Analysis. FGIT-MulGraB (2) 2011: 248-256 - [c21]In-Gul Jang, Zhe-Yan Piao, Ze-Hua Dong, Jin-Gyun Chung, Kang-Yoon Lee:
Low-power FFT design for NC-OFDM in cognitive radio systems. ISCAS 2011: 2449-2452 - [c20]Yong-Kyu Kim, Chang-Seok Choi, Hanho Lee, Jin-Gyun Chung:
Low-complexity filter and interpolator design for ATSC DTV systems. ISOCC 2011: 432-435 - 2010
- [j13]Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Xinming Huang:
CSD-Based Programmable Multiplier Design for Predetermined Coefficient Groups. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(1): 324-326 (2010) - [j12]Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Xinming Huang:
Fixed-Width Group CSD Multiplier Design. IEICE Trans. Inf. Syst. 93-D(6): 1497-1503 (2010) - [j11]Yi-Nan Xu, Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Xinming Huang:
Implementation of FlexRay CC and BG protocols with application to a robot system. Int. J. Comput. Aided Eng. Technol. 2(1): 112-122 (2010) - [c19]Jae-Kyung Lee, Chang-Ha Jeon, In-Gul Jang, Jin-Gyun Chung:
Weighted interpolation using supplementary filter. APCCAS 2010: 528-531
2000 – 2009
- 2009
- [j10]Ki-Sang Jung, Kang-Jik Kim, Yong-Eun Kim, Jin-Gyun Chung, Ki-Hyun Pyun, Jong-Yeol Lee, Hang-Geun Jeong, Seong Ik Cho:
The ROM Design with Half Grouping Compression Method for Chip Area and Power Consumption Reduction. IEICE Trans. Electron. 92-C(3): 352-355 (2009) - 2008
- [c18]In-Gul Jang, Yong-Eun Kim, Yi-Nan Xu, Jin-Gyun Chung:
Efficient IFFT design using mapping method. APCCAS 2008: 878-881 - [c17]Kyung-Ju Cho, Suhyun Jo, Yong-Eun Kim, Yi-Nan Xu, Jin-Gyun Chung:
Constant multiplier design using specialized bit pattern adders. ICECS 2008: 41-44 - [c16]Yi-Nan Xu, Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Myoung-Seob Lim:
Implementation of FlexRay communication controller protocol with application to a robot system. ICECS 2008: 994-997 - [c15]Yong-Eun Kim, Su-Hyun Cho, Jin-Gyun Chung:
Modified CSD group multiplier design for predetermined coefficient groups. ISCAS 2008: 3362-3365 - 2007
- [j9]Kyung-Ju Cho, Jin-Gyun Chung:
Adaptive Error Compensation for Low Error Fixed-Width Squarers. IEICE Trans. Inf. Syst. 90-D(3): 621-626 (2007) - [j8]Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung:
Low Power Small Area Modified Booth Multiplier Design for Predetermined Coefficients. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(3): 694-697 (2007) - [j7]Kyung-Ju Cho, Ji-Suk Park, Byeong-Kuk Kim, Jin-Gyun Chung, Keshab K. Parhi:
Design of a Sample-Rate Converter From CD to DAT Using Fractional Delay Allpass Filter. IEEE Trans. Circuits Syst. II Express Briefs 54-II(1): 19-23 (2007) - [j6]Yuke Wang, Yiyan Tang, Yingtao Jiang, Jin-Gyun Chung, Sang-Seob Song, Myoung-Seob Lim:
Novel Memory Reference Reduction Methods for FFT Implementations on DSP Processors. IEEE Trans. Signal Process. 55(5-2): 2338-2349 (2007) - [c14]Sun-Ah Hong, Yong-Eun Kim, Jin-Gyun Chung, Sung-Chul Lee:
Efficient Squarer Design Using Group Partial Products. SiPS 2007: 146-150 - [c13]Kyung-Ju Cho, Yi-Nan Xu, Jin-Gyun Chung:
Hardware Efficient QR Decomposition for GDFE. SiPS 2007: 412-417 - 2006
- [c12]Young Eun Kim, J. O. Yoon, K. J. Cho, Jin-Gyun Chung, S. I. Cho, S. S. Choi:
Efficient design of modified Booth multipliers for predetermined coefficients. ISCAS 2006 - 2004
- [j5]Yingtao Jiang, Abdulkarim Al-Sheraidah, Yuke Wang, Edwin Hsing-Mean Sha, Jin-Gyun Chung:
A novel multiplexer-based low-power full adder. IEEE Trans. Circuits Syst. II Express Briefs 51-II(7): 345-348 (2004) - [j4]Kyung-Ju Cho, Kwang-Chul Lee, Jin-Gyun Chung, Keshab K. Parhi:
Design of low-error fixed-width modified booth multiplier. IEEE Trans. Very Large Scale Integr. Syst. 12(5): 522-531 (2004) - [c11]Dae-Ik Kim, Sung-Hwan Bae, Mike Myung-Ok Lee, Jin-Gyun Chung:
Area Efficient and Low Power Pipelined IIR Filter Design for Intelligent Integrated Photonic System. HSNMC 2004: 842-847 - [c10]Yiyan Tang, Yuke Wang, Jin-Gyun Chung, Sang Seob Song, Myoung-Seob Lim:
High-speed assembly FFT implementation with memory reference reduction on DSP processors. ICECS 2004: 547-550 - 2003
- [j3]Sang-Min Kim, Jin-Gyun Chung, Keshab K. Parhi:
Low error fixed-width CSD multiplier with efficient sign extension. IEEE Trans. Circuits Syst. II Express Briefs 50(12): 984-993 (2003) - [c9]Ji-Suk Park, Byeong-Kuk Kim, Jin-Gyun Chung, Keshab K. Parhi:
An asynchronous sample-rate converter from CD to DAT. ICASSP (2) 2003: 509-512 - [c8]K. J. Cho, E. M. Choi, Jin-Gyun Chung, M. S. Lim, J. W. Kim:
Low-error fixed-width squarer design. ISCAS (5) 2003: 137-140 - [c7]Ji-Suk Park, Byeong-Kuk Kim, Jin-Gyun Chung, Keshab K. Parhi:
High-speed tunable fractional-delay allpass filter structure. ISCAS (4) 2003: 165-168 - [c6]Hojun Kim, Jin-Gyun Chung:
Minimizing switching activity in input word by offset and its low power applications for FIR filters. ISCAS (5) 2003: 297-300 - 2002
- [j2]Jin-Gyun Chung, Keshab K. Parhi:
Frequency Spectrum Based Low-Area Low-Power Parallel FIR Filter Design. EURASIP J. Adv. Signal Process. 2002(9): 944-953 (2002) - [c5]Sang-Min Kim, Jin-Gyun Chung, Keshab K. Parhi:
Design of low error CSD fixed-width multiplier. ISCAS (1) 2002: 69-72 - 2001
- [c4]Ki-Cheol Tae, Jin-Gyun Chung, Dae-Ik Kim:
Noise generation system using DCT. ISCAS (4) 2001: 29-32 - 2000
- [c3]Jung-Pil Choi, Seung-Cheol Shin, Jin-Gyun Chung:
Efficient ROM size reduction for distributed arithmetic. ISCAS 2000: 61-64
1990 – 1999
- 1995
- [c2]Jin-Gyun Chung, Keshab K. Parhi:
Synthesis and Pipelining of Ladder Wave Digital Filters in Digital Domain. ISCAS 1995: 77-80 - 1994
- [j1]Jin-Gyun Chung, Keshab K. Parhi:
Pipelining of lattice IIR digital filters. IEEE Trans. Signal Process. 42(4): 751-761 (1994) - 1993
- [c1]Jin-Gyun Chung, Keshab K. Parhi:
The scaled normalized lattice digital filter. ISCAS 1993: 483-486
Coauthor Index
aka: Yong-Eun Kim
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