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Yoshifumi Sekine
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2010 – 2019
- 2015
- [j16]Ken Saito, Yuki Ikeda, Minami Takato, Yoshifumi Sekine, Fumio Uchikoba:
Development of quadruped robot with locomotion rhythm generator using pulse-type hardware neural networks. Artif. Life Robotics 20(4): 366-371 (2015) - [c18]Ken Saito, Yuki Ishihara, Kazuki Sugita, Yuki Okane, Hirozumi Oku, Yohei Asano, Kei Iwata, Masaki Tatani, Minami Takato, Yoshifumi Sekine, Fumio Uchikoba:
Artificial neural circuit integration for MEMS microrobot system. AIM 2015: 1055-1060 - 2014
- [c17]Daichi Yamashita, Katsutoshi Saeki, Yoshifumi Sekine:
IC implementation of spike-timing-dependent synaptic plasticity model using low capacitance value. APCCAS 2014: 221-224 - [c16]Katutoshi Sugiyama, Katsutoshi Saeki, Minoru Saito Nihon, Yoshifumi Sekine:
A study on gas sensors using a SAW device. APCCAS 2014: 459-462 - 2013
- [c15]Ken Saito, Shiho Takahama, Shinpei Yamasaki, Minami Takato, Yoshifumi Sekine, Fumio Uchikoba:
IC chip of pulse-type hardware neural networks for hexapod walking MEMS micro robot. IJCNN 2013: 1-6 - 2012
- [c14]Katsutoshi Saeki, Tatsuya Tatebe, Yoshifumi Sekine:
A study on CPG model transition swing and stance pattern with interstitial cells. IJCNN 2012: 1-8 - 2011
- [j15]Kazuto Okazaki, Tatsuya Ogiwara, Dongshin Yang, Kentaro Sakata, Ken Saito, Yoshifumi Sekine, Fumio Uchikoba:
Development of a pulse control-type MEMS microrobot with a hardware neural network. Artif. Life Robotics 16(2): 229-233 (2011) - [c13]Katsutoshi Saeki, Shingo Watanabe, Toshiharu Morita, Yoshifumi Sekine:
Pulse-type Neuro Devices with Two Time Windows in STDP and its Application to the Memory of Temporal Sequences Patterns. BIODEVICES 2011: 426-431 - [c12]Ken Saito, Kazuto Okazaki, Kentaro Sakata, Tatsuya Ogiwara, Yoshifumi Sekine, Fumio Uchikoba:
Pulse-Type Hardware Inhibitory Neural Networks for MEMS micro robot using CMOS technology. IJCNN 2011: 1606-1611 - [c11]Katsutoshi Saeki, Toshiharu Morita, Yoshifumi Sekine:
Associative memory using pulse-type hardware neural network with STDP synapses. ISDA 2011: 947-951
2000 – 2009
- 2009
- [c10]Ken Saito, Katsutoshi Saeki, Yoshifumi Sekine:
Synchronization of coupled pulse-type hardware neuron models for CPG model. IJCNN 2009: 2748-2755 - 2008
- [c9]Katsutoshi Saeki, Yugo Hayashi, Yoshifumi Sekine:
Pulse-Type Neuro Devices with Spike Timing Dependent Synaptic Plasticity. BIODEVICES (1) 2008: 264-268 - [c8]Katsutoshi Saeki, Ryo Shimizu, Yoshifumi Sekine:
Pulse-Type Hardware Neural Network with Two Time Windows in STDP. ICONIP (2) 2008: 877-884 - 2006
- [c7]Katsutoshi Saeki, Yugo Hayashi, Yoshifumi Sekine:
Extraction of Phase Information Buried in Fluctuation of a Pulse-type Hardware Neuron Model Using STDP. IJCNN 2006: 1505-1510 - 2005
- [j14]Naoya Sasano, Katsutoshi Saeki, Yoshifumi Sekine:
Short-term memory circuit using hardware ring neural networks. Artif. Life Robotics 9(2): 81-85 (2005) - 2004
- [j13]Sei Takahashi, Yoshifumi Sekine:
A neural net architecture for hardware implementation of a temporal pattern discrimination model. Syst. Comput. Jpn. 35(9): 104-112 (2004) - [c6]Tetsuya Tsukada, Yoshifumi Sekine:
A Basilar Membrane Model Using Simulink for Hearing-Aid Systems. ICONIP 2004: 1166-1171 - 2003
- [j12]Yoshifumi Sekine:
Foreword. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 251 (2003) - [j11]Yukinori Sakuta, Yuji Arai, Yoshifumi Sekine:
A Consideration on Very Low Phase Noise Oscillator Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 299-303 (2003) - [j10]Katsutoshi Saeki, Yoshifumi Sekine:
CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 424-427 (2003) - [j9]Vasileios Tserolas, Yoshifumi Sekine:
A Minimal Modeling of Neuronal Burst-Firing Based on Bifurcation Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(3): 678-685 (2003) - [j8]Zongyang Xue, Haruki Nagami, Kazutaka Someya, Katsutoshi Saeki, Yoshifumi Sekine:
A Study of Nonlinear Characteristics in a Hardware Active Dendrite Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(9): 2287-2293 (2003) - 2002
- [j7]Jun Matsuoka, Yoshifumi Sekine, Katsutoshi Saeki, Kazuyuki Aihara:
Analog Hardware Implementation of a Mathematical Model of an Asynchronous Chaotic Neuron. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(2): 389-394 (2002) - [j6]Jun Katayama, Yoshifumi Sekine:
Noise Reduction Approach of Range Image Using Nonlinear 2D Kalman Filter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(4): 770-775 (2002)
1990 – 1999
- 1999
- [j5]Kazutaka Someya, Hidekazu Shinozaki, Yoshifumi Sekine:
Pulse-type hardware chaotic neuron model and its bifurcation phenomena. Neural Networks 12(1): 153-161 (1999) - [c5]Kazutaka Someya, Atsushi Fujita, Yoshifumi Sekine, Kawyuki Aihara:
Chaotic phenomena of an active axon. IJCNN 1999: 233-238 - 1998
- [c4]Sei Takahashi, Hiroshi Hakoda, Yoshifumi Sekine:
Temporal Pattern Discrimination Using the Brain Mimic Processor. ICONIP 1998: 570-573 - [c3]Kazutaka Someya, Atsushi Fujita, Katsutoshi Saeki, Yoshifumi Sekine, Kazuyuki Aihara:
Effects on an Active Feature on Neurodynamics and Chaotic Phenomena by Active Axon. ICONIP 1998: 1273-1276 - 1996
- [c2]Kazutaka Someya, Hidekazu Shinozaki, Eiko Miyata, Yoshifumi Sekine:
Internal states of pulse-type hardware neuron model with chaotic dynamics. ICNN 1996: 846-851 - 1995
- [c1]Kazutaka Someya, Eiko Miyata, Yoshifumi Sekine:
A study on the bursting firing phenomena in neural network with the hardware neuron model. ICNN 1995: 3186-3191 - 1992
- [j4]Yoshifumi Sekine, Takeshi Kanai, Takehiko Amamori, Shinya Takahashi, Chie Takeuchi:
Two kinds of pulse-type hardware neuron models and their application to recognition circuits. Syst. Comput. Jpn. 23(14): 84-98 (1992)
1980 – 1989
- 1989
- [j3]Yoshifumi Sekine, Kenji Narumi, Masatoshi Suyama, Masayoshi Noguchi:
Presumption of gating system by sodium activation gating model. Syst. Comput. Jpn. 20(4): 98-104 (1989) - [j2]Yoshifumi Sekine, Masatoshi Suyama, Atsushi Muramatsu:
Spatial feature detection using a pulse-type hardware neuron model. Syst. Comput. Jpn. 20(11): 1-10 (1989) - 1987
- [j1]Yoshifumi Sekine, Masatoshi Suyama, Masayoshi Noguchi, Tohru Ito:
Pulse-type hardware neuron model using a lambda (Λ)-shaped transistor and its application. Syst. Comput. Jpn. 18(5): 100-109 (1987)
Coauthor Index
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