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ORCIDDavid J. Hathaway
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2010 – 2019
- 2013
[c4]Nagu R. Dhanwada, David J. Hathaway, Victor V. Zyuban, Peng Peng, Karl Moody, William W. Dungan, Arun Joseph, Rahul M. Rao, Christopher J. Gonzalez:
Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis. ICCAD 2013: 458-465- 2012
- [j4]Nagu R. Dhanwada, David J. Hathaway, Jerry Frenkil, W. Rhett Davis
, Harun Demircioglu:
Leakage Power Contributor Modeling. IEEE Des. Test Comput. 29(2): 71-78 (2012)
2000 – 2009
- 2007
- [c3]Vladimir Zolotov, Jinjun Xiong, Soroush Abbaspour, David J. Hathaway, Chandu Visweswariah:
Compact modeling of variational waveforms. ICCAD 2007: 705-712 - 2005
- [c2]David J. Hathaway:
Dealing with the spatio-temporal interactions among transient power, supply noise and timing. SLIP 2005: 61 - 2000
- [j3]John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo E. Téllez, Louise Trevillyan:
EDA in IBM: past, present, and future. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(12): 1476-1497 (2000) - [c1]Amir H. Farrahi, David J. Hathaway, Maogang Wang, Majid Sarrafzadeh:
Quality of EDA CAD Tools: Definitions, Metrics and Directions. ISQED 2000: 395-406
1990 – 1999
- 1997
- [j2]David J. Hathaway, Rafik R. Habra, Erich C. Schanzenbach, Sara J. Rothman:
Circuit Placement, Chip Optimization, and Wire Routing for IBM IC Technology. J. VLSI Signal Process. 16(2-3): 191-198 (1997) - 1996
- [j1]David J. Hathaway, Rafik R. Habra, Erich C. Schanzenbach, Sara J. Rothman:
Circuit placement, chip optimization, and wire routing for IBM IC technology. IBM J. Res. Dev. 40(4): 453-460 (1996)
Coauthor Index
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