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ORCIDShuji Tsukiyama
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2010 – 2019
- 2019
[c29]Haruki Kazama, Shuji Tsukiyama:
Gaussian Mixture Reduction Methods Using Support Vector Machine. TENCON 2019: 411-416- 2017
- [j17]Daiki Azuma, Shuji Tsukiyama:
A New Algorithm to Determine Covariance in Statistical Maximum for Gaussian Mixture Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(12): 2834-2841 (2017) - [c28]Daiki Azuma, Shuji Tsukiyama, Masahiro Fukui:
Approximating the maximum of Gaussians by a Gaussian mixture model for statistical designs. ECCTD 2017: 1-4 - 2016
- [j16]Naoya Yokoyama, Daiki Azuma, Shuji Tsukiyama, Masahiro Fukui:
A New Algorithm for Reducing Components of a Gaussian Mixture Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(12): 2425-2434 (2016) - 2015
- [c27]Daisuke Sasaki, Shuji Tsukiyama, Mariko Matsunaga, Junichi Miyamoto, Shingo Takahashi:
A statistical method for analyzing lifetime of a series-connected battery cells. ISCIT 2015: 41-44 - 2013
- [j15]Shuji Tsukiyama, Masahiro Fukui:
A New Delay Distribution Model with a Half Triangular Distribution for Statistical Static Timing Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(12): 2542-2552 (2013) - [c26]Takashi Kambe, Kohsei Takehara, Shuji Tsukiyama:
Application-specific arithmetic circuit design for a particle tracking application. LASCAS 2013: 1-4 - [c25]Shuji Tsukiyama, Masahiro Fukui, Takashi Kambe:
A new delay distribution model to take long-term degradation into account. LASCAS 2013: 1-4 - [c24]Lei Lin, Masahiro Fukui, Shuji Tsukiyama:
An implementation and evaluation of Backward Euler algorithm to GPGPU power grid circuit simulation. NEWCAS 2013: 1-4 - 2011
- [j14]Shuji Tsukiyama, Masahiro Fukui:
A Statistical Maximum Algorithm for Gaussian Mixture Models Considering the Cumulative Distribution Function Curve. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(12): 2528-2536 (2011) - [c23]Shuji Tsukiyama, Masahiro Fukui:
An algorithm to improve accuracy of criticality in statistical static timing analysis. DATE 2011: 1529-1532 - [c22]Shuji Tsukiyama, Masahiro Fukui:
A new statistical maximum operation for Gaussian mixture models and its evaluations. ECCTD 2011: 45-48 - [c21]Shohei Asakawa, Shuji Tsukiyama, Isao Shirakawa, Shuji Nishi, Tadashi Takeda, Tomoyuki Nagai, Yasushi Kubota:
An automatic layout method for timing pulse generator of small LCD driver. ECCTD 2011: 697-700 - [c20]Masahiro Fukui, Haruo Miki, Masaya Yoshikawa, Shuji Tsukiyama:
A power grid optimization algorithm considering via reliability. ECCTD 2011: 809-812 - [c19]Masahiro Fukui, Yoriaki Nagata, Shuji Tsukiyama:
A power grid optimization algorithm considering timing degradation by NBTI. ISOCC 2011: 341-344
2000 – 2009
- 2009
- [j13]Shingo Takahashi, Shuji Tsukiyama:
A New Statistical Timing Analysis Using Gaussian Mixture Models for Delay and Slew Propagated Together. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(3): 900-911 (2009) - [c18]Shingo Takahashi, Yuki Yoshida, Shuji Tsukiyama:
A Gaussian mixture model for statistical timing analysis. DAC 2009: 110-115 - [c17]Takayuki Hayashi, Masahiro Fukui, Shuji Tsukiyama:
A new power grid optimization algorithm based on manufacturing cost restriction. ECCTD 2009: 703-706 - [c16]Shuji Tsukiyama, Masahiro Fukui:
Accuracy of the criticality probabilty of a path in statistical timing analysis. ECCTD 2009: 707-710 - 2008
- [j12]Yoshiyuki Kawakami, Makoto Terao, Masahiro Fukui, Shuji Tsukiyama:
A Power Grid Optimization Algorithm by Observing Timing Error Risk by IR Drop. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3423-3430 (2008) - [c15]Shingo Takahashi, Shuji Tsukiyama:
A new statistical timing analyzer propagating delay and slew distributions simultaneously. APCCAS 2008: 352-355 - 2007
- [j11]Masanori Hashimoto
, Takahito Ijichi, Shingo Takahashi, Shuji Tsukiyama, Isao Shirakawa:
Transistor Sizing of LCD Driver Circuit for Technology Migration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2712-2717 (2007) - 2006
- [j10]Shuji Tsukiyama, Masahiko Tomita:
An Algorithm to Calculate Correlation Coefficients between Interconnect Delays for Use in Statistical Timing Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(2): 535-543 (2006) - [j9]Shingo Takahashi, Shuji Tsukiyama, Masanori Hashimoto, Isao Shirakawa:
A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3538-3545 (2006) - [c14]Shuji Tsukiyama, Masahiko Tomita:
An algorithm for calculating correlation coefficients between Elmore interconnect delays. ISCAS 2006 - 2005
- [c13]Shingo Takahashi, Akira Taji, Shuji Tsukiyama, Masanori Hashimoto, Isao Shirakawa:
A design scheme for sampling switch in active matrix LCD. ECCTD 2005: 31-34 - [c12]Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tsukiyama, Isao Shirakawa:
Interconnect capacitance extraction for system LCD circuits. ACM Great Lakes Symposium on VLSI 2005: 160-163 - 2004
- [c11]Shuji Tsukiyama:
Toward stochastic design for digital circuits: statistical static timing analysis. ASP-DAC 2004: 762-767 - 2003
- [j8]Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, Shigeki Imai:
Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 2923-2932 (2003) - 2002
- [c10]Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, Shigeki Imai:
Parasitic capacitance modeling for multilevel interconnects. APCCAS (1) 2002: 59-64 - 2001
- [c9]Shuji Tsukiyama, Masakazu Tanaka, Masahiro Fukui:
A statistical static timing analysis considering correlations between delays. ASP-DAC 2001: 353-358 - [c8]Makoto Furuie, Takao Onoye, Shuji Tsukiyama, Isao Shirakawa:
Two-dimensional array layout for NMOS 4-phase dynamic logic. ICECS 2001: 589-592 - 2000
- [c7]Naofumi Tsujii, Katsutoshi Baba, Shuji Tsukiyama:
An interconnect topology optimization by a tree transformation. ASP-DAC 2000: 93-98
1990 – 1999
- 1997
- [c6]Yu-Liang Wu, Douglas Chang, Malgorzata Marek-Sadowska, Shuji Tsukiyama:
Not necessarily more switches more routability [sic.]. ASP-DAC 1997: 579-584 - 1996
- [j7]Yu-Liang Wu, Shuji Tsukiyama, Malgorzata Marek-Sadowska:
Graph based analysis of 2-D FPGA routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(1): 33-44 (1996) - 1995
- [c5]Masayuki Hayashi, Shuji Tsukiyama:
A hybrid hierarchical approach for multi-layer global routing. ED&TC 1995: 492-497 - 1994
- [c4]Yu-Liang Wu, Shuji Tsukiyama, Malgorzata Marek-Sadowska:
On computational complexity of a detailed routing problem in two dimensional FPGAs. Great Lakes Symposium on VLSI 1994: 70-75 - 1993
- [p1]Shuji Tsukiyama, Keiichi Koike, Isao Shirakawa:
An Algorithm to Eliminate All Complex Triangles in a Maximal Planar Graph for Use in VLSI floorplan. Algorithmic Aspects of VLSI Layout 1993: 321-335 - 1992
- [c3]Takashi Shimamoto, Hidetaka Hane, Isao Shirakawa, Shuji Tsukiyama, Shoji Shinoda, Nobuyasu Yui, Nobuyuki Nishiguchi:
A distributed routing system for multilayer SOG. EURO-DAC 1992: 298-303 - 1991
- [j6]Katsunori Tani, Shuji Tsukiyama, Shoji Shinoda, Isao Shirakawa:
On area-efficient drawings of rectangular duals for VLSI floor-plan. Math. Program. 52: 29-43 (1991)
1980 – 1989
- 1983
- [j5]Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa:
On the Layering Problem of Multilayer PWB Wiring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(1): 30-38 (1983) - [j4]Shuji Tsukiyama, Ikuo Harada, Masahiro Fukui, Isao Shirakawa:
A New Global Router for Gate Array LSIsi. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(4): 313-321 (1983) - 1982
- [j3]Shuji Tsukiyama, Ernest S. Kuh:
Double-row planar routing and permutation layout. Networks 12(3): 287-316 (1982) - 1981
- [c2]Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa:
On the layering problem of multilayer PWB wiring. DAC 1981: 738-745 - 1980
- [j2]Shuji Tsukiyama, Isao Shirakawa, Hiroshi Ozaki, Hiromu Ariyoshi:
An Algorithm to Enumerate All Cutsets of a Graph in Linear Time per Cutset. J. ACM 27(4): 619-632 (1980) - [c1]Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa:
On the layering problem of multilayer PWB wiring. Graph Theory and Algorithms 1980: 20-37
1970 – 1979
- 1977
- [j1]Shuji Tsukiyama, Mikio Ide, Hiromu Ariyoshi, Isao Shirakawa:
A New Algorithm for Generating All the Maximal Independent Sets. SIAM J. Comput. 6(3): 505-517 (1977)
Coauthor Index
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