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Reetinder P. S. Sidhu

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2000 – 2009

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2008
[c6]
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  - conf/fpl/YamagakiSK08
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Norio Yamagaki, Reetinder P. S. Sidhu, Satoshi Kamiya:
High-speed regular expression matching engine using multi-character NFA. FPL 2008: 131-136
2002
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Reetinder P. S. Sidhu, Viktor K. Prasanna:
Efficient Metacomputation Using Self-Reconfiguration. FPL 2002: 698-709
2001
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Reetinder P. S. Sidhu, Viktor K. Prasanna:
Fast Regular Expression Matching Using FPGAs. FCCM 2001: 227-238
2000
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  - conf/fpl/SidhuWMP00
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Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna:
A Self-Reconfigurable Gate Array Architecture. FPL 2000: 106-120

1990 – 1999

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1999
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Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna:
String Natching on Nulticontext FPGAs Using Self-Reconfiguration. FPGA 1999: 217-226
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Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna:
Genetic Programming Using Self-Reconfigurable FPGAs. FPL 1999: 301-312

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