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2020 – today
- 2022
[c12]Yu Lee, Tzu-Chieh Kao, Zhen-Ming Huang, Hsuan-Po Lin, Chun-Ta Wu, Chao-Yu Chen:
Robust Timing Synchronization Algorithm for 5G New Radio. WF-IoT 2022: 1-5
2010 – 2019
- 2019
- [j4]I-Che Ou
, Jia-Ping Yang, Chia-Hung Liu, Kai-Jie Huang, Kun-Ju Tsai, Yu Lee, Yuan-Hua Chu, Yu-Te Liao:
A Sustainable Soil Energy Harvesting System With Wide-Range Power-Tracking Architecture. IEEE Internet Things J. 6(5): 8384-8392 (2019) - 2018
- [c11]I-Che Ou, Jia-Ping Yang, Chia-Hung Liu, Kai-Jie Huang, Kun-Ju Tsai, Yu Lee, Yuan-Hua Chu, Yu-Te Liao:
A Wide-Range Capacitive DC-DC Converter with 2D-MPPT for Soil/Solar Energy Extraction. A-SSCC 2018: 37-38 - 2017
- [j3]Ting-Chou Lu, Ming-Dou Ker, Hsiao-Wen Zan, Jen-Chieh Liu, Yu Lee:
A 8 Phases 192MHz Crystal-Less Clock Generator with PVT Calibration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(1): 275-282 (2017) - 2016
- [c10]Ting-Chou Lu, Li-Ren Huang, Yu Lee, Kun-Ju Tsai, Yu-Te Liao, Nai-Chen Cheng, Yuan-Hua Chu, Yi-Hsing Tsai, Fang-Chu Chen, Tzi-cker Chiueh:
Invited - Wireless sensor nodes for environmental monitoring in internet of things. DAC 2016: 3:1-3:5 - [c9]Pau Herrero, Mohamed Fayez El-Sharkawy, Peter Pesl, Bernard Hernandez, Lorraine Choi, Osama M. Awara, Yu Lee, Jian Lim, Mohamed M. Yusof, Aaron Sheah, Liyangyi Yu, Pantelis Georgiou:
Live demonstrator: Challenging the Bio-inspired Artificial Pancreas with a mixed-meal model library. ISCAS 2016: 1444 - 2013
- [c8]Chih-Hsiang Chang, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng, Nai-Chen Cheng:
A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS. ESSCIRC 2013: 53-56 - 2012
- [c7]Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang:
A chip-to-chip clock-deskewing circuit for 3-D ICs. ISCAS 2012: 1652-1655 - 2010
- [c6]Yu Lee, Ching-Yuan Yang, Nai-Chen Daniel Cheng, Ji-Jan Chen:
An embedded wide-range and high-resolution CLOCK jitter measurement circuit. DATE 2010: 1637-1640
2000 – 2009
- 2009
- [c5]Yu Lee, Moon-Ryul Jung:
Retargeting Motion of Clothing to New Characters. GRAPP 2009: 280-285 - 2008
- [j2]Ching-Yuan Yang, Yu Lee:
A PWM and PAM Signaling Hybrid Technology for Serial-Link Transceivers. IEEE Trans. Instrum. Meas. 57(5): 1058-1070 (2008) - [c4]Gung-Yu Lin, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng:
A programmable duty cycle corrector based on delta-sigma modulated PWM mechanism. APCCAS 2008: 1406-1409 - [c3]Nai-Chen Daniel Cheng, Yu Lee, Ji-Jan Chen:
Experimental Results of Built-In Jitter Measurement for Gigahertz Clock. ATS 2008: 268 - 2007
- [c2]Nai-Chen Daniel Cheng, Yu Lee, Ji-Jan Chen:
A 2-ps Resolution Wide Range BIST Circuit for Jitter Measurement. ATS 2007: 219-223 - 2006
- [j1]Ching-Yuan Yang, Yu Lee, Cheng-Hsing Lee:
A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector. IEICE Trans. Electron. 89-C(6): 746-752 (2006) - 2005
- [c1]Ching-Yuan Yang, Yu Lee:
A 0.18-µm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques. ISCAS (2) 2005: 1150-1153
Coauthor Index
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