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2020 – today
- 2023
[j8]Yuejian Wu, Linqing Zhao
, Jiwen Lu, Haibin Yan:
Dense Hybrid Proposal Modulation for Lane Detection. IEEE Trans. Circuits Syst. Video Technol. 33(11): 6845-6859 (2023)- [c21]Domaniç Lavery, Siddharth Varughese, Carlo Condo, Mohammad Osman, Mehdi Torbatian, Sandy Thomson, Yuejian Wu, Robert Maher, Han Sun:
Promising DSP Techniques to Increase Long Haul Transmission Capacity. OFC 2023: 1-3 - [i2]Yuejian Wu, Linqing Zhao, Jiwen Lu, Haibin Yan:
Dense Hybrid Proposal Modulation for Lane Detection. CoRR abs/2304.14874 (2023) - 2021
- [c20]Robert Maher, Mohammad Reza Chitgarha, Irene Leung, Amir Rashidinejad, Brandon Buscaino, Zhenxing Wang, Mehdi Torbatian, Aditya Kakkar, Ziad A. El-Sahn, Mohammad Osman, Ales Kumpera, Reza Mirzaei Nejad, Amin Yekani, George Soliman, Clayton Doggart, Miguel Iglesias Olmedo, Samantha Kerns, Júlio C. M. Diniz, Zulfikar Morbi, Swen Koenig, Lee Dardis, Bryan Ellis, Alban Le Liepvre, Mark Missey, Stanley Blakey, Yuejian Wu, Parmijit Samra, Vince Dominic, Sergejs Makovejs, Vikrant Lal, Mehrdad Ziari, Han Sun, Kuang-Tsan Wu, Steve Sanders, Parthiban Kandappan:
Real-Time 100.4 GBd PCS-64QAM Transmission of a 1.6 Tb/s Super-Channel Over 1600 km of G.654.E Fiber. OFC 2021: 1-3 - 2020
- [c19]Han Sun, Mehdi Torbatian, Mehdi Karimi, Robert Maher, Sandy Thomson, Mohsen Nader Tehrani, Yuliang Gao, Ales Kumpera, George Soliman, Aditya Kakkar, Mohammad Osman, Ziad A. El-Sahn, Clayton Doggart, Weikun Hou, Shailesh Sutarwala, Yuejian Wu, Mohammad Reza Chitgarha, Vikrant Lal, Huan-Shang Tsai, Scott Corzine, Jiaming Zhang, John Osenbach, Sanketh Buggaveeti, Zulfikar Morbi, Miguel Iglesias Olmedo, Irene Leung, Xian Xu, Parmijit Samra, Vince Dominic, Steve Sanders, Mehrdad Ziari, Antonio Napoli, Bernhard Spinnler, Kuang-Tsan Wu, Parthiban Kandappan:
800G over 1000 km enabled by real-time DSP ASIC employing Probabilistic Shaping and Digital Sub-Carrier Multiplexing. ICTON 2020: 1-4
2010 – 2019
- 2015
- [j7]Yuejian Wu, Sandy Thomson, Han Sun, David Krause, Song Yu, George Kurio:
Free Razor: A Novel Voltage Scaling Low-Power Technique for Large SoC Designs. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2431-2437 (2015) - 2014
- [c18]Han Sun, Kuang-Tsan Wu, Sandy Thomson, Yuejian Wu:
Novel 16QAM carrier recovery based on blind phase search. ECOC 2014: 1-3 - 2012
- [c17]Yuejian Wu, Sandy Thomson, Han Sun, David Krause, Song Yu, George Kurio:
"Free" Razor: A novel adaptive voltage scaling low power technique for data path SoC designs. SoCC 2012: 33-38 - 2011
- [j6]Yuejian Wu, Sandy Thomson, Dale Mutcher, Eric Hall:
Built-In Functional Tests for Silicon Validation and System Integration of Telecom SoC Designs. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 629-637 (2011)
2000 – 2009
- 2008
- [c16]Yuejian Wu, Sandy Thomson, Han Sun, Chandra Bontu, Eric Hall:
Built-in functional tests for fast validation of a 40Gbps coherent optical receiver SoC ASIC. SoCC 2008: 55-58 - 2007
- [i1]Baosheng Wang, Yuejian Wu, André Ivanov:
A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. CoRR abs/0710.4655 (2007) - 2006
- [j5]Josh Yang, Baosheng Wang, Yuejian Wu, André Ivanov:
Fast detection of data retention faults and other SRAM cell open defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 167-180 (2006) - [c15]Yuejian Wu, André Ivanov:
Low Power SoC Memory BIST. DFT 2006: 197-205 - 2005
- [c14]Baosheng Wang, Josh Yang, Yuejian Wu, André Ivanov:
A retention-aware test power model for embedded SRAM. ASP-DAC 2005: 1180-1183 - [c13]Baosheng Wang, Yuejian Wu, André Ivanov:
A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. DATE 2005: 852-857 - [c12]Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian:
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. VTS 2005: 66-71 - 2004
- [c11]Baosheng Wang, Yuejian Wu, André Ivanov:
Designs for Reducing Test Time of Distributed Small Embedded SRAMs. DFT 2004: 120-128 - [c10]Yuejian Wu:
Low power decoding of BCH codes. ISCAS (2) 2004: 369-372 - 2003
- [j4]Yuejian Wu, Paul N. MacDonald:
Testing ASICs with multiple identical cores. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(3): 327-336 (2003) - 2002
- [c9]Robert Gibbins, R. Dean Adams, Thomas J. Eckenrode, Michael Ouellette, Yuejian Wu:
Design and Test of a 9-port SRAM for a 100Gb/s STS-1 Switch. MTDT 2002: 83- - 2001
- [c8]Yuejian Wu, Liviu Calin:
Shadow write and read for at-speed BIST of TDM SRAMs. ITC 2001: 985-994
1990 – 1999
- 1999
- [j3]Yuejian Wu, Saman Adham:
Scan-based BIST fault diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(2): 203-211 (1999) - [c7]Yuejian Wu, Paul Soong:
Interconnect delay fault testing with IEEE 1149.1. ITC 1999: 449-457 - 1998
- [c6]Yuejian Wu:
Diagnosis of Scan Chain Failures. DFT 1998: 217- - 1997
- [c5]Yuejian Wu, Sanjay Gupta:
Built-In Self-Test for Multi-Port RAMs. Asian Test Symposium 1997: 398-403 - 1996
- [c4]Yuejian Wu, Saman Adham:
BIST Fault Diagnosis in Scan-Based VLSI Environments. ITC 1996: 48-57 - 1995
- [j2]Yuejian Wu, André Ivanov:
Reducing Hardware with Fuzzy Multiple Signature Analysis. IEEE Des. Test Comput. 12(1): 68-74 (1995) - [j1]Yuejian Wu, André Ivanov:
Single-Reference Multiple Intermediate Signature (SREMIS) Analysis for BIST. IEEE Trans. Computers 44(6): 817-825 (1995) - 1993
- [c3]Gang Li, Hussein Alnuweiri, Yuejian Wu, Hongbing Li:
Acceleration of back propagation through initial weight pre-training with delta rule. ICNN 1993: 580-585 - [c2]Yuejian Wu, André Ivanov:
Minimal hardware multiple signature analysis for BIST. VTS 1993: 17-20 - 1992
- [c1]Yuejian Wu, André Ivanov:
Accelerated path delay fault simulation. VTS 1992: 1-6
Coauthor Index
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