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2020 – today
- 2023
[c52]Noel Daniel Gundi, Zinnia Muntaha Mowri, Andrew Chamberlin, Sanghamitra Roy, Koushik Chakraborty
:
STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit. DAC 2023: 1-6- 2021
- [j31]Chidhambaranathan Rajamanikkam, Rajesh J. S., Sanghamitra Roy, Koushik Chakraborty:
Understanding Security Threats in Emerging Neuromorphic Computing Architecture. J. Hardw. Syst. Secur. 5(1): 45-57 (2021) - [j30]Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Sanghamitra Roy, Koushik Chakraborty:
EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units. IEEE Trans. Very Large Scale Integr. Syst. 29(10): 1790-1799 (2021) - [c51]Pramesh Pandey, Noel Daniel Gundi, Koushik Chakraborty, Sanghamitra Roy:
UPTPU: Improving Energy Efficiency of a Tensor Processing Unit through Underutilization Based Power-Gating. DAC 2021: 325-330 - [c50]Riley Roberts, Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Sanghamitra Roy, Koushik Chakraborty, Zhen Zhang:
Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System. FMICS 2021: 232-248 - [i2]Rourab Paul, Sreetama Sarkar, Suman Sau, Koushik Chakraborty, Sanghamitra Roy, Amlan Chakrabarti:
Voltage Scaling for Partitioned Systolic Array in A Reconfigurable Platform. CoRR abs/2102.06888 (2021) - [i1]Riley Roberts, Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Sanghamitra Roy, Koushik Chakraborty, Zhen Zhang:
Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System. CoRR abs/2108.13148 (2021) - 2020
- [j29]Prabal Basu, Pramesh Pandey, Aatreyi Bal, Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy:
TITAN: Uncovering the Paradigm Shift in Security Vulnerability at Near-Threshold Computing. IEEE Trans. Emerg. Top. Comput. 8(4): 986-997 (2020) - [j28]Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty:
Exploring Warp Criticality in Near-Threshold GPGPU Applications Using a Dynamic Choke Point Analysis. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 456-466 (2020) - [j27]Pramesh Pandey, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy:
GreenTPU: Predictive Design Paradigm for Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1557-1566 (2020) - [c49]Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Sanghamitra Roy, Koushik Chakraborty, Zhen Zhang:
EFFORT: Enhancing Energy Efficiency and Error Resilience of a Near-Threshold Tensor Processing Unit. ASP-DAC 2020: 241-246
2010 – 2019
- 2019
- [j26]Rajesh J. S., Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy:
Securing Data Center Against Power Attacks. J. Hardw. Syst. Secur. 3(2): 177-188 (2019) - [j25]Chidhambaranathan Rajamanikkam, Rajesh J. S., Koushik Chakraborty, Sanghamitra Roy:
Energy Efficient Network-on-Chip Architectures for Many-Core Near-Threshold Computing System. J. Low Power Electron. 15(2): 115-128 (2019) - [c48]Pramesh Pandey, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy:
GreenTPU: Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit. DAC 2019: 173 - [c47]Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty:
Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis. DATE 2019: 444-449 - [c46]Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty, Sanghamitra Roy, Zhen Zhang:
Probabilistic Verification for Reliable Network-on-Chip System Design. FMICS 2019: 110-126 - 2018
- [j24]Prabal Basu, Chidhambaranathan Rajamanikkam, Aatreyi Bal, Pramesh Pandey, Trevor Carter, Koushik Chakraborty, Sanghamitra Roy:
FIFA: Exploring a Focally Induced Fault Attack Strategy in Near-Threshold Computing. IEEE Embed. Syst. Lett. 10(4): 115-118 (2018) - [j23]Chidhambaranathan Rajamanikkam, Kurt Brenning, Andrew Deakin, Sanghamitra Roy, Koushik Chakraborty:
TASPDetect: Reviving Trust in 3PIP By Detecting TASP Trojans. Microprocess. Microsystems 56: 76-83 (2018) - [j22]Aatreyi Bal, Shamik Saha, Sanghamitra Roy, Koushik Chakraborty:
Dynamic Choke Sensing for Timing Error Resilience in NTC Systems. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 1-10 (2018) - [j21]Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty:
Trident: Comprehensive Choke Error Mitigation in NTC Systems. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2195-2204 (2018) - [c45]Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty:
Trident: A comprehensive timing error resilient technique against choke points at NTC. DATE 2018: 355-360 - [c44]Pramesh Pandey, Asmita Pal, Koushik Chakraborty, Sanghamitra Roy:
Reliability and Uniformity Enhancement in 8T-SRAM based PUFs operating at NTC. ISLPED 2018: 7:1-7:6 - [c43]Tahmoures Shabanian, Aatreyi Bal, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy:
ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU. ISLPED 2018: 28:1-28:6 - 2017
- [j20]Rajesh Jayashankara Shridevi, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Security Measures Against a Rogue Network-on-Chip. J. Hardw. Syst. Secur. 1(2): 173-187 (2017) - [j19]Asmita Pal, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy:
Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit. J. Low Power Electron. 13(3): 419-427 (2017) - [j18]Shamik Saha, Prabal Basu, Chidhambaranathan Rajamanikkam, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy:
SSAGA: SMs Synthesized for Asymmetric GPGPU Applications. ACM Trans. Design Autom. Electr. Syst. 22(3): 49:1-49:20 (2017) - [j17]Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty, Sanghamitra Roy:
IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 2035-2044 (2017) - [c42]Aatreyi Bal, Shamik Saha, Sanghamitra Roy, Koushik Chakraborty:
Revamping timing error resilience to tackle choke points at NTC systems. DATE 2017: 1020-1025 - 2016
- [c41]Atif Yasin, Jeff Jun Zhang, Hu Chen, Siddharth Garg, Sanghamitra Roy, Koushik Chakraborty:
Synergistic timing speculation for multi-threaded programs. DAC 2016: 51:1-51:6 - [c40]Rajesh Jayashankara Shridevi, Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy:
Catching the flu: emerging threats from a third party power management unit. DAC 2016: 86:1-86:6 - [c39]Prabal Basu, Hu Chen, Shamik Saha, Koushik Chakraborty, Sanghamitra Roy:
SwiftGPU: fostering energy efficiency in a near-threshold GPU through a tactical performance boost. DAC 2016: 150:1-150:6 - [c38]Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty, Sanghamitra Roy:
PRADA: Combating voltage noise in the NoC power supply through flow-control and routing algorithms. DATE 2016: 1461-1464 - [c37]Chidhambaranathan Rajamanikkam, Rajesh J. S., Koushik Chakraborty, Sanghamitra Roy:
BoostNoC: power efficient network-on-chip architecture for near threshold computing. ICCAD 2016: 124 - 2015
- [j16]Dieudonne Manzi Mugisha, Hu Chen, Sanghamitra Roy, Koushik Chakraborty:
Resilient Cache Design for Mobile Processors in the Near-Threshold Regime. J. Low Power Electron. 11(2): 112-120 (2015) - [j15]Hu Chen, Sanghamitra Roy, Koushik Chakraborty:
DARP-MP: Dynamically Adaptable Resilient Pipeline Design in Multicore Processors. ACM Trans. Design Autom. Electr. Syst. 21(1): 3:1-3:21 (2015) - [j14]Dean Michael Ancajas, Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy:
Wearout Resilience in NoCs Through an Aging Aware Adaptive Routing Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 369-373 (2015) - [c36]Hu Chen, Dieudonne Manzi, Sanghamitra Roy, Koushik Chakraborty:
Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks. DAC 2015: 63:1-63:6 - [c35]Rajesh Jayashankara Shridevi, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Tackling voltage emergencies in NoC through timing error resilience. ISLPED 2015: 104-109 - [c34]Rajesh J. S., Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Runtime Detection of a Bandwidth Denial Attack from a Rogue Network-on-Chip. NOCS 2015: 8:1-8:8 - 2014
- [j13]Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Exploring High-Throughput Computing Paradigm for Global Routing. IEEE Trans. Very Large Scale Integr. Syst. 22(1): 155-167 (2014) - [j12]Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty:
Dark Silicon Aware Multicore Systems: Employing Design Automation With Architectural Insight. IEEE Trans. Very Large Scale Integr. Syst. 22(5): 1192-1196 (2014) - [c33]Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy, Jason M. Allred:
Tackling QoS-induced aging in exascale systems through agile path selection. CODES+ISSS 2014: 16:1-16:10 - [c32]Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Fort-NoCs: Mitigating the Threat of a Compromised NoC. DAC 2014: 158:1-158:6 - [c31]Hu Chen, Sanghamitra Roy, Koushik Chakraborty:
DARP: Dynamically Adaptable Resilient Pipeline design in microprocessors. DATE 2014: 1-6 - [c30]Hu Chen, Sanghamitra Roy, Koushik Chakraborty:
Exploiting static and dynamic locality of timing errors in robust L1 cache design. ISQED 2014: 9-15 - 2013
- [j11]Satyajit Desai, Sanghamitra Roy:
Using Adaptive Body Biasing for Robust Process Variation Aware DRAM Design. J. Low Power Electron. 9(1): 23-36 (2013) - [j10]Koushik Chakraborty, Sanghamitra Roy:
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 670-679 (2013) - [c29]Dean Michael Ancajas, James McCabe Nickerson, Koushik Chakraborty, Sanghamitra Roy:
HCI-tolerant NoC router microarchitecture. DAC 2013: 40:1-40:10 - [c28]Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy, Dean Michael Ancajas:
Efficiently tolerating timing violations in pipelined microprocessors. DAC 2013: 102:1-102:8 - [c27]Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
DMR3D: dynamic memory relocation in 3D multicore systems. DAC 2013: 157:1-157:9 - [c26]Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Proactive aging management in heterogeneous NoCs through a criticality-driven routing approach. DATE 2013: 1032-1037 - [c25]Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty:
Long term sustainability of differentially reliable systems in the dark silicon era. ICCD 2013: 70-77 - [c24]Yiding Han, Koushik Chakraborty, Sanghamitra Roy:
A global router on GPU architecture. ICCD 2013: 78-84 - 2012
- [j9]Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy, Yiding Han:
Analysis of intermittent timing fault vulnerability. Microelectron. Reliab. 52(7): 1515-1522 (2012) - [j8]Koushik Chakraborty, Sanghamitra Roy:
Stack Aware Threshold Voltage Assignment in 3-D Multicore Designs. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 512-522 (2012) - [c23]Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy:
Towards graceful aging degradation in NoCs through an adaptive routing algorithm. DAC 2012: 382-391 - [c22]Sanghamitra Roy, Koushik Chakraborty:
Predicting timing violations through instruction-level path sensitization analysis. DAC 2012: 1074-1081 - [c21]Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy:
An MILP-based aging-aware routing algorithm for NoCs. DATE 2012: 326-331 - [c20]Saurabh Kothawade, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Mitigating NBTI in the physical register file through stress prediction. ICCD 2012: 345-351 - [c19]Yiding Han, Koushik Chakraborty, Sanghamitra Roy:
DOC: Fast and accurate congestion analysis for global routing. ICCD 2012: 508-509 - [c18]Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty:
Designing for dark silicon: a methodological perspective on energy efficient systems. ISLPED 2012: 255-260 - [c17]Satyajit Desai, Sanghamitra Roy, Koushik Chakraborty:
Process variation aware DRAM design using block based adaptive body biasing algorithm. ISQED 2012: 255-261 - [c16]Kshitij Bhardwaj, Sanghamitra Roy, Koushik Chakraborty:
Power-Performance Yield optimization for MPSoCs using MILP. ISQED 2012: 764-771 - 2011
- [j7]Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty:
Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural Framework. J. Low Power Electron. 7(3): 303-313 (2011) - [j6]Sanghamitra Roy, Koushik Chakraborty:
Exploiting dynamic micro-architecture usage in gate sizing. Microprocess. Microsystems 35(4): 417-425 (2011) - [j5]Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala:
Design and Implementation of a Throughput-Optimized GPU Floorplanning Algorithm. ACM Trans. Design Autom. Electr. Syst. 16(3): 23:1-23:21 (2011) - [c15]Koushik Chakraborty, Sanghamitra Roy:
Topologically homogeneous power-performance heterogeneous multicore systems. DATE 2011: 125-130 - [c14]Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy:
Exploring high throughput computing paradigm for global routing. ICCAD 2011: 298-305 - [c13]Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy:
Analysis and mitigation of NBTI aging in register file: An end-to-end approach. ISQED 2011: 1-7 - [c12]Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty:
Integrated circuit-architectural framework for PSN aware floorplanning in microprocessors. ISQED 2011: 212-218 - [c11]Yiding Han, Sanghamitra Roy, Koushik Chakraborty:
Optimizing simulated annealing on GPU: A case study with IC floorplanning. ISQED 2011: 263-269 - [c10]Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala:
A GPU Algorithm for IC Floorplanning: Specification, Analysis and Optimization. VLSI Design 2011: 159-164 - 2010
- [j4]Koushik Chakraborty, Sanghamitra Roy:
A Novel Threshold Voltage Assignment for 3D Multicore Designs. J. Low Power Electron. 6(3): 436-446 (2010) - [c9]Sanghamitra Roy, Koushik Chakraborty:
Microarchitecture aware gate sizing: A framework for circuit-architecture co-optimization. ICCD 2010: 222-228 - [c8]Sanghamitra Roy, Koushik Chakraborty:
A convex optimization framework for leakage aware thermal provisioning in 3D multicore architectures. ISQED 2010: 804-811 - [c7]Koushik Chakraborty, Sanghamitra Roy:
Rethinking Threshold Voltage Assignment in 3D Multicore Designs. VLSI Design 2010: 375-380
2000 – 2009
- 2008
- [c6]Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Chen, Shih-Pin Hung, Tse-Yu Chiang, Jiuan-Guei Tseng:
An optimal algorithm for sizing sequential circuits for industrial library based designs. ASP-DAC 2008: 148-151 - [r1]Sanghamitra Roy, Charlie Chung-Ping Chen:
Wire Sizing. Handbook of Algorithms for Physical Design Automation 2008 - 2007
- [j3]Sanghamitra Roy, Weijen Chen, Charlie Chung-Ping Chen, Yu Hen Hu:
Numerically Convex Forms and Their Application in Gate Sizing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(9): 1637-1647 (2007) - [c5]Sanghamitra Roy, Charlie Chung-Ping Chen:
SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design. ASP-DAC 2007: 559-564 - 2006
- [c4]Sanghamitra Roy, Charlie Chung-Ping Chen:
ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems. ISQED 2006: 665-670 - 2005
- [j2]Sanghamitra Roy, Prith Banerjee:
An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design. IEEE Trans. Computers 54(7): 886-896 (2005) - [c3]Sanghamitra Roy, Weijen Chen:
ConvexFit: an optimal minimum-error convex fitting and smoothing algorithm with application to gate-sizing. ICCAD 2005: 196-203 - 2004
- [c2]Sanghamitra Roy, Prithviraj Banerjee:
An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. DAC 2004: 484-487 - [c1]Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee:
An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. FPGA 2004: 256 - 2003
- [j1]Biswajit Sarkar, Sanghamitra Roy, Debranjan Sarkar:
Hierarchical representation of digitized curves through dominant point detection. Pattern Recognit. Lett. 24(15): 2869-2882 (2003)
Coauthor Index
[c52] [j31] [j30] [c51] [c50] [i2] [i1] [j29] [j28] [j27] [c49] [j26] [j25] [c48] [c47] [c46] [j24] [j23] [j22] [j21] [c45] [c44] [c43] [j20] [j19] [j18] [j17] [c42] [c41] [c40] [c39] [c38] [c37] [j16] [j15] [j14] [c36] [c35] [c34] [j13] [j12] [c33] [c32] [c31] [c30] [j10] [c29] [c28] [c27] [c26] [c25] [c24] [j9] [j8] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [j7] [j6] [j5] [c15] [c14] [c13] [c12] [c11] [c10] [j4] [c9] [c8] [c7]
Rajesh J. S.
aka: Rajesh Jayashankara Shridevi
aka: Rajesh Jayashankara Shridevi
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