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ORCIDLuis Gabriel Murillo
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2010 – 2019
- 2017
[c13]Gereon Onnebrink, Florian Walbroel, Jonathan Klimt
, Rainer Leupers, Gerd Ascheid, Luis Gabriel Murillo, Stefan Schürmans, Xiaotao Chen, YwhPyng Harn:
DVFS-enabled power-performance trade-off in MPSoC SW application mapping. SAMOS 2017: 196-202- 2016
- [j3]Pier Stanislao Paolucci, Andrea Biagioni, Luis Gabriel Murillo, Frédéric Rousseau, Lars Schor, Laura Tosoratto, Iuliana Bacivarov, Robert Lajos Bücs, Clément Deschamps, Ashraf El Antably, Roberto Ammendola, Nicolas Fournel, Ottorino Frezza, Rainer Leupers, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Elena Pastorelli, Devendra Rai, Davide Rossetti, Francesco Simula:
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms. J. Syst. Archit. 69: 29-53 (2016) - [j2]Luis Gabriel Murillo, Robert Lajos Bücs, Rainer Leupers, Gerd Ascheid:
MPSoC Software Debugging on Virtual Platforms via Execution Control with Event Graphs. ACM Trans. Embed. Comput. Syst. 16(1): 7:1-7:25 (2016) - [j1]Jan Henrik Weinstock, Luis Gabriel Murillo, Rainer Leupers, Gerd Ascheid:
Parallel SystemC Simulation for ESL Design. ACM Trans. Embed. Comput. Syst. 16(1): 27:1-27:25 (2016) - [c12]Miguel Angel Aguilar, Rainer Leupers, Gerd Ascheid, Luis Gabriel Murillo:
Automatic parallelization and accelerator offloading for embedded applications on heterogeneous MPSoCs. DAC 2016: 49:1-49:6 - 2015
- [c11]Luis Gabriel Murillo, Robert Lajos Bücs, Daniel Hincapie, Rainer Leupers, Gerd Ascheid:
SWAT: Assertion-based debugging of concurrency issues at system level. ASP-DAC 2015: 600-605 - [c10]Robert Lajos Bücs, Luis Gabriel Murillo, Ekaterina Korotcenko, Gaurav Dugge, Rainer Leupers, Gerd Ascheid, Andreas Ropers, Markus Wedler, Andreas Hoffmann:
Virtual hardware-in-the-loop co-simulation for multi-domain automotive systems via the functional mock-up interface. FDL 2015: 49-56 - [c9]Luis Gabriel Murillo, Robert Lajos Bücs, Rainer Leupers, Gerd Ascheid:
Deterministic event-based control of Virtual Platforms for MPSoC software debugging. SAMOS 2015: 348-353 - [c8]Juan Fernando Eusse, Luis Gabriel Murillo, Christopher McGirr, Rainer Leupers, Gerd Ascheid:
Application-Specific Architecture Exploration Based on Processor-Agnostic Performance Estimation. SCOPES 2015: 84-87 - 2014
- [c7]Luis Gabriel Murillo, Simon Wawroschek, Jerónimo Castrillón, Rainer Leupers, Gerd Ascheid:
Automatic detection of concurrency bugs through event ordering constraints. DATE 2014: 1-6 - [c6]Lars Schor, Iuliana Bacivarov, Luis Gabriel Murillo, Pier Stanislao Paolucci, Frédéric Rousseau, Ashraf El Antably, Robert Buecs, Nicolas Fournel, Rainer Leupers, Devendra Rai, Lothar Thiele, Laura Tosoratto, Piero Vicini, Jan Weinstock:
EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems. ISPA 2014: 182-189 - [c5]Juan Fernando Eusse Giraldo, Christopher Williams, Luis Gabriel Murillo, Rainer Leupers, Gerd Ascheid:
Pre-architectural performance estimation for ASIP design based on abstract processor models. ICSAMOS 2014: 133-140 - 2012
- [c4]Luis Gabriel Murillo, Juan Fernando Eusse, Jovana Jovic, Sergey Yakoushkin, Rainer Leupers, Gerd Ascheid:
Synchronization for hybrid MPSoC full-system simulation. DAC 2012: 121-126 - [c3]Jovana Jovic, Sergey Yakoushkin, Luis Gabriel Murillo, Juan Fernando Eusse, Rainer Leupers, Gerd Ascheid:
Hybrid simulation for extensible processor cores. DATE 2012: 288-291
2000 – 2009
- 2009
- [c2]Luis Gabriel Murillo, Marcello Mura, Mauro Prevostini:
Semi-automated Hw/Sw Co-design for embedded systems: from MARTE models to SystemC simulators. FDL 2009: 1-6 - 2008
- [c1]Marcello Mura, Luis Gabriel Murillo, Mauro Prevostini:
Model-based Design Space Exploration for RTES with SysML and MARTE. FDL 2008: 203-208
Coauthor Index
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