"No cache-coherence: a single-cycle ring interconnection for multi-core ..."

Shu-Hsuan Chou et al. (2009)

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DOI: 10.1145/1629911.1630062

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang:
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. DAC 2009: 587-592

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