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"Mitigating FPGA interconnect soft errors by in-place LUT inversion."
Naifeng Jing et al. (2011)
- Naifeng Jing, Ju-Yueh Lee, Weifeng He, Zhigang Mao, Lei He:
Mitigating FPGA interconnect soft errors by in-place LUT inversion. ICCAD 2011: 582-586
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