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"Arithmetic circuits for single-bit digital signal processing."

Hisato Fujisaka et al. (1999)

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DOI: 10.1109/ICECS.1999.850722

access: closed

type: Conference or Workshop Paper

metadata version: 2021-02-02

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  dblp key:
  - conf/icecsys/FujisakaMSM99
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  - https://dblp.org/rec/conf/icecsys/FujisakaMSM99
Hisato Fujisaka, Naoyuki Masuda, Masahiro Sakamoto, Mititada Morisue:
Arithmetic circuits for single-bit digital signal processing. ICECS 1999: 1389-1392

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