"Low-latency, HDL-synthesizable dynamic clock frequency controller with ..."

Robert M. Senger et al. (2006)

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DOI: 10.1109/ISCAS.2006.1692700

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Robert M. Senger, Eric D. Marsman, Gordy A. Carichner, Sundus Kubba, Michael S. McCorquodale, Richard B. Brown:
Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking. ISCAS 2006

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