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"A 5GHz 7nm L1 cache memory compiler for high-speed computing and mobile ..."
Michael Clinton et al. (2018)
- Michael Clinton, Rajinder Singh, Marty Tsai, Shayan Zhang, Bryan Sheffield, Jonathan Chang:
A 5GHz 7nm L1 cache memory compiler for high-speed computing and mobile applications. ISSCC 2018: 200-201
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