"Reconfigurable arithmetic logic unit designed with threshold logic gates."

Alejandro Medina-Santiago et al. (2019)

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DOI: 10.1049/IET-CDS.2018.0046

access: closed

type: Journal Article

metadata version: 2025-01-19

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Alejandro Medina-Santiago, Mario Alfredo Reyes-Barranca, Ignacio Algredo-Badillo, Alfonso Martinez Cruz, Kelsey A. Ramírez-Gutiérrez, Eleazar Adrián Cortés-Barrón:
Reconfigurable arithmetic logic unit designed with threshold logic gates. IET Circuits Devices Syst. 13(1): 21-30 (2019)

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