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"3D floorplanning of low-power and area-efficient Network-on-Chip architecture."

Licheng Xue et al. (2011)

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DOI: 10.1016/J.MICPRO.2011.04.001

access: closed

type: Journal Article

metadata version: 2024-05-03

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Licheng Xue, Feng Shi, Weixing Ji, Haroon-Ur-Rashid Khan:
3D floorplanning of low-power and area-efficient Network-on-Chip architecture. Microprocess. Microsystems 35(5): 484-495 (2011)

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