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Integration, Volume 76
Volume 76, January 2021
- Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma:
READ: A fixed restoring array based accuracy-configurable approximate divider for energy efficiency. 1-12 - Mohamed Chentouf, Foffie Stevmelin, Zine El Abidine Alaoui Ismaili:
Power-aware hold optimization for ASIC physical synthesis. 13-24 - Kulbhushan Sharma, Anisha Pathania, Rahul Pandey, Jaya Madan, Rajnish Sharma:
MOS based pseudo-resistors exhibiting Tera Ohms of Incremental Resistance for biomedical applications: Analysis and proof of concept. 25-39 - Anirban Bhattacharjee, Chandan Bandyopadhyay, Philipp Niemann, Bappaditya Mondal, Rolf Drechsler, Hafizur Rahaman:
An improved heuristic technique for nearest neighbor realization of quantum circuits in 2D architecture. 40-54 - Francisco Garcia-Herrero, Alfonso Sánchez-Macián, Juan Antonio Maestro:
Low delay non-binary error correction codes based on Orthogonal Latin Squares. 55-60 - El Bakkali Moustapha, Elftouh Hanae, Naima Amar Touhami, Taj-eddin Elhamadi:
2.3-21 GHz broadband and high linearity distributed low noise amplifier. 61-68 - Bibin Sam Paul S, Antony Xavier Glittas, Gopalakrishnan Lakshminarayanan:
A low latency modular-level deeply integrated MFCC feature extraction architecture for speech recognition. 69-75 - Poornima Narayanasamy, Seetharaman Gopalakrishnan, Santhi Muthurathinam:
Custom NoC topology generation using Discrete Antlion Trapping Mechanism. 76-86
- Daniel Öhlinger, Jürgen Maier, Matthias Függer, Ulrich Schmid:
The Involution Tool for Accurate Digital Timing and Power Analysis. 87-98
- Suvajit Roy, Radha Raman Pal:
Electronically tunable third-order dual-mode quadrature sinusoidal oscillators employing VDCCs and all grounded components. 99-112 - Mohamad Hasani Sadi, Ali Mahani:
Accelerating Deep Convolutional Neural Network base on stochastic computing. 113-121 - Kolluri Rajesh, Sumanta Pyne:
Invasive weed optimization based scheduling for digital microfluidic biochip operations. 122-134 - Mojtaba Valinataj, Zahra Yazdanian Amiri:
Comments on "Improved designs of digit-by-digit decimal multiplier". 135-138 - Frank Herzel, Arzu Ergintav, Gunter Fischer:
A novel approach to fractional-N PLLs generating ultra-fast low-noise chirps for FMCW radar. 139-147 - Inga Abel, Maximilian Neuner, Helmut Graeb:
COPRICSI: COnstraint-PRogrammed Initial Circuit SIzing. 148-158 - Anirban Tarafdar, Abir J. Mondal, Uttam Kumar Bera, Bidyut K. Bhattacharyya:
A PVT aware differential delay circuit and its performance variation due to power supply noise. 159-171 - Bahram Rashidi:
Compact and efficient structure of 8-bit S-box for lightweight cryptography. 172-182 - Young Seo Lee, Kyung Min Kim, Ji Heon Lee, Young-Ho Gong, Seon Wook Kim, Sung Woo Chung:
Monolithic 3D stacked multiply-accumulate units. 183-189 - Laurence Pierre:
Refinement rules for the automatic TLM-to-RTL conversion of temporal assertions. 190-204
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