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ORCIDSoumya Chandramouli
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2010 – 2019
- 2019
[j2]Ashkan Roshan-Zamir
, Takayuki Iwai, Yang-Hang Fan, Ankur Kumar, Hae-Woong Yang, Lee Sledjeski, John Hamilton, Soumya Chandramouli, Arlo Aude, Samuel Palermo:
A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS. IEEE J. Solid State Circuits 54(3): 672-684 (2019)- 2018
- [c6]Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan, Ankur Kumar, Hae-Woong Yang, Lee Sledjeski, John Hamilton, Soumya Chandramouli, Arlo Aude, Samuel Palermo:
A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS. CICC 2018: 1-4
2000 – 2009
- 2007
- [c5]Soumya Chandramouli, Franklin Bien, Hyoungsoo Kim, Edward Gebara, Joy Laskar:
A 10-Gb/sec unclocked current-mode logic (CML) analog decision-feedback equalizer (ADFE) in 0.18-μm CMOS. ESSCIRC 2007: 512-515 - [c4]Hyoungsoo Kim, Franklin Bien, Youngsik Hur, Soumya Chandramouli, Jeongwon Cha, Edward Gebara, Joy Laskar:
A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication. ISCAS 2007: 193-196 - [c3]Franklin Bien, Soumya Chandramouli, Hyoungsoo Kim, Edward Gebara, Joy Laskar:
Digitally Controlled 10-Gb/s Adjustable Delay Line for Adaptive Filter Design in standard CMOS Technology. ISCAS 2007: 197-200 - 2005
- [c2]Carl Chun, Youngsik Hur, Moonkyun Maeng, Hyoungsoo Kim, Soumya Chandramouli, Edward Gebara, Joy Laskar:
A 0.18µm-CMOS near-end crosstalk (NEXT) noise canceller utilizing tunable active filters for 4-PAM/20Gbps throughput backplane channels. ISCAS (5) 2005: 4847-4850 - [c1]Hyoungsoo Kim, Youngsik Hur, Moonkyun Maeng, Franklin Bien, Soumya Chandramouli, Edward Gebara, Joy Laskar:
A Novel Clock Recovery Scheme with Improved Jitter Tolerance for PAM4 Signaling. IWSOC 2005: 101-106 - 2004
- [j1]Cattalen Pelard, Edward Gebara, Andrew J. Kim, Michael G. Vrazel, Franklin Bien, Youngsik Hur, Moonkyun Maeng, Soumya Chandramouli, Carl Chun, Sanjay Bajekal, Stephen E. Ralph, Bruce Schmukler, Vincent M. Hietala, Joy Laskar:
Realization of multigigabit channel equalization and crosstalk cancellation integrated circuits. IEEE J. Solid State Circuits 39(10): 1659-1670 (2004)
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