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ORCIDSribalan Santhanam
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2000 – 2009
- 2007
[c3]Daniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare:
A 2GHz, 7W (max) 64b PowerTM Microprocessor Core. CICC 2007: 725-728- [c2]Zongjian Chen, Priya Ananthanarayanan, Sukalp Biswas, Brian Campbell, Hao Chen, Shaishav Desai, Dominic Go, Rajat Goel, Vincent von Kaenel, Jason Kassoff, Fabian Klass, Weichun Ku, Tony Li, Jonathon Lin, Khurram Malik, Anup Mehta, Daniel Murray, Eric Shiu, Chris Shuler, Sribalan Santhanam, Greg Scott, Junji Sugisawa, Toshinari Takayanagi, Honkai John Tarn, Pradeep Trivedi, James Wang, Ricky Wen, John Yong:
A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems. ISSCC 2007: 104-105 - 2006
- [c1]Andrew Yang, Rajit Chandra, Simon Burke, Javier A. DeLaCruz, Sribalan Santhanam, Uming Ko:
Entering the hot zone - can you handle the heat and be cool? DAC 2006: 174-175
1990 – 1999
- 1998
- [j6]Sribalan Santhanam, Allen J. Baum, David Bertucci, Mike Braganza, Kevin Broch, Todd Broch, James Burnette, Edward Chang, Kwong-Tak Chui, Dan Dobberpuhl, Paul M. Donahue, Joel Grodstein, Insung Kim, Daniel Murray, Mark H. Pearce, Amy Silveria, Dave Souydalay, Aaron Spink, Robert Stepanian, Anand Varadharajan, Vincent R. von Kaenel, Ricky Wen:
A low-cost, 300-MHz, RISC CPU with attached media processor. IEEE J. Solid State Circuits 33(11): 1829-1839 (1998) - 1997
- [j5]James Montanaro, Richard T. Witek, Krishna Anne, Andrew J. Black, Elizabeth M. Cooper, Daniel W. Dobberpuhl, Paul M. Donahue, Jim Eno, Gregory W. Hoeppner, David Kruckemyer, Thomas H. Lee, Peter C. M. Lin, Liam Madden, Daniel Murray, Mark H. Pearce, Sribalan Santhanam, Kathryn J. Snyder, Ray Stephany, Stephen C. Thierauf:
A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor. Digit. Tech. J. 9(1) (1997) - 1996
- [j4]James Montanaro, Richard T. Witek, Krishna Anne, Andrew J. Black, Elizabeth M. Cooper, Daniel W. Dobberpuhl, Paul M. Donahue, Jim Eno, Gregory W. Hoeppner, David Kruckemyer, Thomas H. Lee, Peter C. M. Lin, Liam Madden, Daniel Murray, Mark H. Pearce, Sribalan Santhanam, Kathryn J. Snyder, Ray Stephany, Stephen C. Thierauf:
A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor. IEEE J. Solid State Circuits 31(11): 1703-1714 (1996) - 1995
- [j3]William J. Bowhill, Shane L. Bell, Bradley J. Benschneider, Andrew J. Black, Sharon M. Britton, Ruben W. Castelino, Dale R. Donchin, John H. Edmondson, Harry R. Fair III, Paul E. Gronowski, Anil K. Jain, Patricia L. Kroesen, Marc E. Lamere, Bruce J. Loughlin, Shekhar Mehta, Robert O. Mueller, Ronald P. Preston, Sribalan Santhanam, Timothy A. Shedd, Michael J. Smith, Stephen C. Thierauf:
Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU. Digit. Tech. J. 7(1) (1995) - [j2]Bradley J. Benschneider, Andrew J. Black, William J. Bowhill, Sharon M. Britton, Daniel E. Dever, Dale R. Donchin, Robert J. Dupcak, Richard M. Fromm, Mary K. Gowan, Paul E. Gronowski, Michael Kantrowitz, Marc E. Lamere, Shekhar Mehta, Jeanne E. Meyer, Robert O. Mueller, Andy Olesin, Ronald P. Preston, Donald A. Priore, Sribalan Santhanam, Michael J. Smith, Gilbert M. Wolrich:
A 300-MHz 64-b quad-issue CMOS RISC microprocessor. IEEE J. Solid State Circuits 30(11): 1203-1214 (1995) - 1992
- [j1]Daniel W. Dobberpuhl, Richard T. Witek, Randy L. Allmon, Robert Anglin, David Bertucci, Sharon M. Britton, Linda Chao, Robert A. Conrad, Daniel E. Dever, Bruce Gieseke, Soha Hassoun, Gregory W. Hoeppner, Kathryn Kuchler, Maureen Ladd, Burton M. Leary, Liam Madden, Edward J. McLellan, Derrick Meyer, James Montanaro, Donald A. Priore, Vidya Rajagopalan, Sridhar Samudrala, Sribalan Santhanam:
A 200-MHz 64-bit Dual-Issue CMOS Microprocessor. Digit. Tech. J. 4(4) (1992)
Coauthor Index
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