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ORCIDJishun Kuang
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2020 – today
- 2023
[j20]Jinhui Tan
, Jishun Kuang, Xing Hu, Xiaomin Cai, Jiahe Shi:
The design of ΔΣ-ADC in MEMS gyro interface ASIC. Microelectron. J. 134: 105696 (2023)- 2022
- [j19]Jinhui Tan, Jishun Kuang, Xing Hu, Lin Xiao:
Small-Signal Processing Low-Overhead Operational Amplifier for delta-Sigma ADC. J. Circuits Syst. Comput. 31(17): 2250306:1-2250306:19 (2022) - 2021
- [j18]Minghe Zhang, Jishun Kuang, Jing Huang, Renfa Li:
Improving Compression Ratios for Code-Based Test Pattern Compressions through Column-Wise Reordering Algorithms. J. Circuits Syst. Comput. 30(6): 2150108:1-2150108:22 (2021)
2010 – 2019
- 2019
- [j17]Zaihong He, Jishun Kuang, Yanjie Tan, Shihui Peng, Huailiang Tan:
LPCMsim: A Lightweight Phase Change Memory Simulator. Future Gener. Comput. Syst. 97: 661-673 (2019) - [c14]Zaihong He, Jishun Kuang, Yanjie Tan, Wenjie Liu, Bin Sheng:
Design and Implementation of GPU Accelerated Active Storage in FastDFS. HPCC/SmartCity/DSS 2019: 542-551 - [c13]Minghe Zhang, Jishun Kuang, Jing Huang, Zhiqiang You:
A Pseudo-Random Transform Decomposition Method for Improving the Coding Compression Ratio of Test Data. HPCC/SmartCity/DSS 2019: 1611-1618 - 2018
- [j16]Yan Chen, Zhiqiang You, Yingjie Zhang, Jishun Kuang, Jing Zhang:
A novel memristor-based restricted Boltzmann machine for contrastive divergence. IEICE Electron. Express 15(2): 20171062 (2018) - 2016
- [j15]Liao Wu, Jishun Kuang, Zhiqiang You, Peng Liu, Shuo Cai:
A parallel-SSHI rectifier for ultra-low-voltage piezoelectric vibration energy harvesting. IEICE Electron. Express 13(17): 20160539 (2016) - [j14]Ling Zhang, Jishun Kuang:
Representative Scan Architecture. J. Circuits Syst. Comput. 25(5): 1650040:1-1650040:8 (2016) - [c12]Yingbo Zhou, Jishun Kuang:
A sort method to enhance significant spectral components of test set. ICNC-FSKD 2016: 2147-2151 - 2015
- [j13]Peng Liu, Zhiqiang You, Jishun Kuang, Zhipeng Hu, Weizheng Wang:
Logic operation-based DFT method and 1R memristive crossbar March-like test algorithm. IEICE Electron. Express 12(23): 20150839 (2015) - [j12]Tieqiao Liu, Jishun Kuang, Shuo Cai, Zhiqiang You:
An efficient small-delay faults simulator based on critical path tracing. Int. J. Circuit Theory Appl. 43(8): 1015-1023 (2015) - [c11]Jishun Kuang, Liang Zhang, Zhiqiang You, Yingbo Zhou:
Improve the compression ratios for code-based test vector compressions by decomposing. ETS 2015: 1-6 - [c10]Liao Wu, Dong Sam Ha, Jishun Kuang, Xuan-Dien Do, Sang-Gug Lee:
An active rectifier with optimal flip timing for the internal capacitor for piezoelectric vibration energy harvesting. MWSCAS 2015: 1-4 - 2014
- [j11]Weiwei Wang, Zhiqiang You, Peng Liu, Jishun Kuang:
An adaptive neural network A/D converter based on CMOS/memristor hybrid design. IEICE Electron. Express 11(24): 20141012 (2014) - 2013
- [j10]Bosheng Liu, Zhiqiang You, Xiangrao Li, Jishun Kuang, Zheng Qin:
Comparator and half adder design using complementary resistive switches crossbar. IEICE Electron. Express 10(13): 20130369 (2013) - 2012
- [j9]Zhiqiang You, Weizheng Wang, Peng Liu, Jishun Kuang, Zheng Qin:
A scan disabling-based BAST scheme for test cost and test power reduction. IEICE Electron. Express 9(2): 111-116 (2012) - [j8]Weizheng Wang, Jishun Kuang, Peng Liu, Xin Peng, Zhiqiang You:
Switching activity reduction for scan-based BIST using weighted scan input data. IEICE Electron. Express 9(10): 874-880 (2012) - [j7]Weizheng Wang, Jishun Kuang, Zhiqiang You:
Achieving low capture and shift power in linear decompressor-based test compression environment. Microelectron. J. 43(2): 134-140 (2012) - [j6]Ling Zhang, Jishun Kuang, Zhiqiang You:
Virtual scan chains reordering using a RAM-based module for high test compression. Microelectron. J. 43(11): 869-872 (2012) - 2011
- [j5]Ling Zhang, Jishun Kuang, Zhiqiang You:
Test Data Compression Using Selective Sparse Storage. J. Electron. Test. 27(4): 565-577 (2011) - [j4]Zhiqiang You, Weizheng Wang, Zhiping Dou, Peng Liu, Jishun Kuang:
A scan disabling-based BAST scheme for test cost reduction. IEICE Electron. Express 8(16): 1367-1373 (2011) - [j3]Ling Zhang, Jishun Kuang:
A New Test Data Compression Scheme. J. Comput. 6(7): 1297-1301 (2011) - [j2]Ling Zhang, Jishun Kuang, Zhiqiang You:
Test data compression using interval broadcast scan for embedded cores. Microelectron. J. 42(11): 1313-1319 (2011) - 2010
- [c9]Zhiqiang You, Jiedi Huang, Michiko Inoue, Jishun Kuang, Hideo Fujiwara:
Capture in Turn Scan for Reduction of Test Data Volume, Test Application Time and Test Power. Asian Test Symposium 2010: 371-374 - [c8]Ling Zhang, Jishun Kuang, Zhiqiang You:
Test Data Compression Using Four-Coded and Sparse Storage for Testing Embedded Core. ICA3PP (2) 2010: 434-443
2000 – 2009
- 2009
- [c7]Li Liu, Jishun Kuang, Huawei Li:
Small Delay Fault Simulation for Sequential Circuits. PRDC 2009: 63-68 - 2008
- [c6]Jishun Kuang, Ouyang Xiong, Zhiqiang You:
A Novel BIST Scheme Using Test Vectors Applied by Circuit-under-Test Itself. ATS 2008: 75-80 - [c5]Gui Dai, Zhiqiang You, Jishun Kuang, Jiedi Huang:
DCScan: A Power-Aware Scan Testing Architecture. ATS 2008: 348-455 - [c4]Yong-sheng Cheng, Zhiqiang You, Jishun Kuang:
Test Response Data Volume and Wire Length Reductions for Extended Compatibilities Scan Tree Construction. DELTA 2008: 308-313 - 2005
- [c3]Ling Zhang, Jishun Kuang:
A New BIST Solution for System-on-Chip. PRDC 2005: 109-113 - 2003
- [j1]Jishun Kuang, Zhiqiang Yang, Qijian Zhu, Yinghua Min:
IDDT: Fundamentals and Test Generation. J. Comput. Sci. Technol. 18(3): 299-307 (2003) - [c2]Yinghua Min, Jishun Kuang, Xiaoyan Niu:
At-Speed Current Testing. Asian Test Symposium 2003: 396-399 - [c1]Jishun Kuang, Yu Wang, Xiaofen Wei, Changnian Zhang:
IDDT ATPG Based on Ambiguous Delay Assignments. Asian Test Symposium 2003: 400-405
Coauthor Index
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