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Heiko Kalte
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2000 – 2009
- 2006
- [c18]Heiko Kalte, Mario Porrmann:
REPLICA2Pro: task relocation by bitstream manipulation in virtex-II/Pro FPGAs. Conf. Computing Frontiers 2006: 403-412 - [c17]Markus Koester, Heiko Kalte, Mario Porrmann:
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems. ERSA 2006: 70-76 - 2005
- [j1]Heiko Kalte, Boris Kettelhoit, Markus Köster, Mario Porrmann, Ulrich Rückert:
A system approach for partially reconfigurable architectures. Int. J. Embed. Syst. 1(3/4): 274-290 (2005) - [c16]Heiko Kalte, Mario Porrmann:
Context Saving and Restoring for Multitasking in Reconfigurable Systems. FPL 2005: 223-228 - [c15]Markus Koester, Mario Porrmann, Heiko Kalte:
Task Placement for Heterogeneous Reconfigurable Architectures. FPT 2005: 43-50 - [c14]Heiko Kalte, Gareth Lee, Mario Porrmann, Ulrich Rückert:
REPLICA: A Bitstream Manipulation Filter for Module Relocation in Partial Reconfigurable Systems. IPDPS 2005 - [c13]Markus Koester, Heiko Kalte, Mario Porrmann, Ulrich Rückert:
Defragmentation Algorithms for Partially Reconfigurable Hardware. VLSI-SoC 2005: 41-53 - 2004
- [b1]Heiko Kalte:
Einbettung dynamisch rekonfigurierbarer Hardwarearchitekturen in eine Universalprozessorumgebung. University of Paderborn, 2004, ISBN 3-935433-48-4, pp. 1-195 - [c12]Heiko Kalte, Mario Porrmann, Ulrich Rückert:
Leistungsbewertung unterschiedlicher Einbettungsvariaten dynamisch rekonfigurierbarer Hardware. ARCS Workshops 2004: 235-244 - [c11]Heiko Kalte, Markus Koester, Boris Kettelhoit, Mario Porrmann, Ulrich Rückert:
A Comparative Study on System Approaches for Partially Reconfigurable Architectures. ERSA 2004: 70-76 - [c10]Heiko Kalte, Gareth Lee, Mario Porrmann, Ulrich Rückert:
Study on column wise design compaction for reconfigurable systems. FPT 2004: 413-416 - [c9]Dirk Koch, Ali Ahmadinia, Christophe Bobda, Heiko Kalte:
FPGA architecture extensions for preemptive multitasking and hardware defragmentation. FPT 2004: 433-436 - [c8]Heiko Kalte, Mario Porrmann, Ulrich Rückert:
System-on-Programmable-Chip Approach Enabling Online Fine-Grained 1D-Placement. IPDPS 2004 - 2003
- [c7]Klaus Danne, Christophe Bobda, Heiko Kalte:
Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System. Engineering of Reconfigurable Systems and Algorithms 2003: 147-153 - [c6]Klaus Danne, Christophe Bobda, Heiko Kalte:
Run-Time Exchange of Mechatronic Controllers Using Partial Hardware Reconfiguration. FPL 2003: 272-281 - 2002
- [c5]Mario Porrmann, Marc Franzmeier, Heiko Kalte, Ulf Witkowski, Ulrich Rückert:
A reconfigurable SOM hardware accelerator. ESANN 2002: 337-342 - [c4]Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rückert:
Dynamically Reconfigurable Hardware - A New Perspective for Neural Network Implementations. FPL 2002: 1048-1057 - [c3]Heiko Kalte, Dominik Langen, Erik Vonnahme, André Brinkmann, Ulrich Rückert:
Dynamically Reconfigurable System-on-Programmable-Chip. PDP 2002: 235-242 - [c2]Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rückert:
Implementation of Artificial Neural Networks on a Reconfigurable Hardware Accelerator. PDP 2002: 243- - 2000
- [c1]Heiko Kalte, Mario Porrmann, Ulrich Rückert:
Using a Dynamically Reconfigurable System to Accelerate Octree Based 3D Graphics. PDPTA 2000
Coauthor Index
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