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ORCIDManoj Kumar Majumder
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2020 – today
- 2024
[c18]Nidhee Bhuwal, Manoj Kumar Majumder, Deepika Gupta:
Implementation of Floating Charged Memristor Emulator utilizing DVCCTA. ISCAS 2024: 1-5- [c17]Shivangi Chandrakar, Deepika Gupta, Manoj Kumar Majumder:
Crosstalk and Power Analysis in Tapered based Composite Cu-CNT TSV in 3D IC. ISCAS 2024: 1-5 - [c16]Nidhee Bhuwal, Kamal Solanki, Manoj Kumar Majumder, Deepika Gupta:
Flux Controlled Grounded Meminductor Emulator Using Single DVCCTA. VLSID 2024: 107-112 - 2023
- [c15]Vandana Kumari, Maya Chandrakar, Manoj Kumar Majumder:
Performance Analysis of Cylindrical Through Silicon Via with Interfacial Crack. ISQED 2023: 1-6 - 2022
- [c14]Shivangi Chandrakar, Kunal Kranti Das, Deepika Gupta, Manoj Kumar Majumder:
Signal Integrity and Power Loss Analysis for Different Bump Structures in Cylindrical TSV. VDAT 2022: 358-372 - 2021
- [j8]Aditya Japa
, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi:
Tunnel FET-based ultra-lightweight reconfigurable TRNG and PUF design for resource-constrained internet of things. Int. J. Circuit Theory Appl. 49(8): 2299-2311 (2021) - [j7]Shivangi Chandrakar, Deepika Gupta, Manoj Kumar Majumder:
Role of Through Silicon Via in 3D Integration: Impact on Delay and Power. J. Circuits Syst. Comput. 30(3): 2150051:1-2150051:20 (2021) - 2020
- [j6]Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi:
Low area overhead DPA countermeasure exploiting tunnel transistor-based random number generator. IET Circuits Devices Syst. 14(5): 640-647 (2020) - [j5]Vijay Rao Kumbhare, Punya Prasanna Paltani, Manoj Kumar Majumder:
Performance analysis of mixed CNT bundle interconnects at 10 nm technology. IET Circuits Devices Syst. 14(7): 1049-1057 (2020) - [j4]Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi:
Tunnel FET-based ultralow-power and hardware-secure circuit design considering p-i-n forward leakage. Int. J. Circuit Theory Appl. 48(4): 524-538 (2020) - [c13]Aditya Japa, Palagani Yellappa, Venkateswarlu Gonuguntla, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Jun Rim Choi, Ramesh Vaddi:
A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET. ISCAS 2020: 1-5 - [c12]Chopali Chanchal Sahu, Shivangi Chandrakar, Manoj Kumar Majumder:
Signal Transmission and Reflection Losses of Cylindrical and Tapered shaped TSV in 3D Integrated Circuits. iSES 2020: 44-47
2010 – 2019
- 2019
- [j3]Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi:
Tunnel FET ambipolarity-based energy efficient and robust true random number generator against reverse engineering attacks. IET Circuits Devices Syst. 13(5): 689-695 (2019) - [c11]Arushi Shrivastava, Parul Damahe, Vijay Rao Kumbhare, Manoj Kumar Majumder:
Designing SRAM Using CMOS and CNTFET at 32 nm Technology. iSES 2019: 284-287 - [c10]Purvi Agrawal, Ruchi Dhamnani, Ananya Garg, Shrivishal Tripathi, Manoj Kumar Majumder:
An Efficient Wireless Charging Technique Using Inductive and Resonant Circuits. VDAT 2019: 164-170 - [c9]Vijay Rao Kumbhare, Punya Prasanna Paltani, Manoj Kumar Majumder:
Novel Approach for Improved Signal Integrity and Power Dissipation Using MLGNR Interconnects. VDAT 2019: 617-629 - 2018
- [c8]Balkrishna Choubey, Vijay Rao Kumbhare, Manoj Kumar Majumder:
Performance Analysis of Graphene Based Optical Interconnect at Nanoscale Technology. VDAT 2018: 418-429 - 2015
- [j2]Manoj Kumar Majumder, Pankaj Kumar Das, Vobulapuram Ramesh Kumar, Brajesh Kumar Kaushik:
Crosstalk Induced Delay Analysis of Randomly Distributed Mixed CNT Bundle Interconnect. J. Circuits Syst. Comput. 24(10): 1550145:1-1550145:15 (2015) - 2014
- [j1]Manoj Kumar Majumder, Pankaj Kumar Das, Brajesh Kumar Kaushik:
Delay and crosstalk reliability issues in mixed MWCNT bundle interconnects. Microelectron. Reliab. 54(11): 2570-2577 (2014) - 2013
- [c7]Jainender Kumar, Manoj Kumar Majumder, Brajesh Kumar Kaushik, Sudeb Dasgupta:
Analysis of Crosstalk Deviation for Bundled MWCNT with Process Induced Height and Width Variations. VDAT 2013: 214-222 - 2012
- [c6]Manoj Kumar Majumder, Nisarg D. Pandya, Brajesh Kumar Kaushik, S. K. Manhas:
Analysis of crosstalk delay and area for MWNT and bundled SWNT in global VLSI interconnects. ISQED 2012: 291-297 - [c5]Manoj Kumar Majumder, Nisarg D. Pandya, Brajesh Kumar Kaushik, S. K. Manhas:
Comparison of crosstalk delay between single and bundled SWNT for global VLSI interconnects. RAIT 2012: 564-569 - [c4]Baljit Kaur, Manoj Kumar Majumder:
Novel VLSI architecture for two-dimensional radon transform computations. RAIT 2012: 570-575 - [c3]Pankaj Kumar Das, Manoj Kumar Majumder, Brajesh Kumar Kaushik, S. K. Manhas:
Propagation Delay Analysis for Bundled Multi-Walled CNT in Global VLSI Interconnects. SocProS 2012: 1117-1126 - [c2]Gunti Nagendra Babu, Brajesh Kumar Kaushik, Anand Bulusu, Manoj Kumar Majumder:
Low Complexity Encoder for Crosstalk Reduction in RLC Modeled Interconnects. VDAT 2012: 40-45 - [c1]Naveen Kaushik, Brajesh Kumar Kaushik, Davinder Kaur, Manoj Kumar Majumder:
Independent Gate SRAM Based on Asymmetric Gate to Source/Drain Overlap-Underlap Device FinFET. VDAT 2012: 373-374
Coauthor Index
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