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ORCIDRichard H. Turner
Person information
- affiliation: Queen's University Belfast, School of Electrical and Electronic Engineering, UK
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2000 – 2009
- 2004
[j2]Richard H. Turner, Roger F. Woods
:
Highly efficient, limited range multipliers for LUT-based FPGA architectures. IEEE Trans. Very Large Scale Integr. Syst. 12(10): 1113-1118 (2004)- 2003
- [c7]Richard H. Turner, Roger F. Woods:
Design Flow for Efficient FPGA Reconfiguration. FPL 2003: 972-975 - 2002
- [c6]Tim Courtney, Richard H. Turner, Roger F. Woods:
Mapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXes. FCCM 2002: 318- - [c5]Richard H. Turner, Roger F. Woods, Tim Courtney:
Multiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs. FPL 2002: 192-201 - 2001
- [j1]Jean-Paul Heron, Roger F. Woods, Sakir Sezer, Richard H. Turner:
Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead. J. VLSI Signal Process. 28(1-2): 97-113 (2001) - [c4]Richard H. Turner, Tim Courtney, Roger F. Woods:
Implementation of fixed DSP functions using the reduced coefficient multiplier. ICASSP 2001: 881-884 - 2000
- [c3]Tim Courtney, Richard H. Turner, Roger F. Woods:
An Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing. FCCM 2000: 341-343 - [c2]Tim Courtney, Richard H. Turner, Roger F. Woods:
Multiplexer Based Reconfiguration for Virtex Multipliers. FPL 2000: 749-758
1990 – 1999
- 1999
- [c1]Richard H. Turner, Roger F. Woods, Sakir Sezer, Jean-Paul Heron:
A Virtual Hardware Handler for RTR Systems. FCCM 1999: 262-263
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