"A 65nm 39GOPS/W 24-core processor with 11Tb/s/W packet-controlled ..."

Peng Ou et al. (2013)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2013.6487635

access: closed

type: Conference or Workshop Paper

metadata version: 2018-03-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/OuZQLHYYCFZLJZY13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/OuZQLHYYCFZLJZY13
Peng Ou, Jiajie Zhang, Heng Quan, Yi Li, Maofei He, Zheng Yu, Xueqiu Yu, Shile Cui, Jie Feng, Shikai Zhu, Jie Lin, Ming-e Jing, Xiaoyang Zeng, Zhiyi Yu:
A 65nm 39GOPS/W 24-core processor with 11Tb/s/W packet-controlled circuit-switched double-layer network-on-chip and heterogeneous execution array. ISSCC 2013: 56-57

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.