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  • Kiełbik R, Rudnicki K, Mudza Z and Jung J. (2020). Methodology of Firmware Development for ARUZ—An FPGA-Based HPC System. Electronics. 10.3390/electronics9091482. 9:9. (1482).

    https://www.mdpi.com/2079-9292/9/9/1482

  • Mao F, Zhang W, Feng B, He B and Ma Y. Modular Placement for Interposer based Multi-FPGA Systems. Proceedings of the 26th edition on Great Lakes Symposium on VLSI. (93-98).

    https://doi.org/10.1145/2902961.2903025

  • Nunna K, Mehdipour F and Murakami K. 3D FPGA versus multiple FPGA system. Proceedings of the Twelfth Australasian Symposium on Parallel and Distributed Computing - Volume 152. (37-43).

    /doi/10.5555/2667672.2667677

  • Lin P. Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening. Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD 2012). (153-158).

    https://doi.org/10.1109/ICCD.2012.6378634

  • Bolchini C and Sandionigi C. A Reliability-Aware Partitioner for Multi-FPGA Platforms. Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. (34-40).

    https://doi.org/10.1109/DFT.2011.20

  • Khodja D, Kheldoun A and Refoufi L. Sigmoid function approximation for ANN implementation in FPGA devices. Proceedings of the 9th WSEAS international conference on Circuits, systems, electronics, control & signal processing. (112-116).

    /doi/10.5555/1938801.1938822

  • Liu H and Wong D. (2006). Network-flow-based multiway partitioning with area and pin constraints. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 17:1. (50-59). Online publication date: 1-Nov-2006.

    https://doi.org/10.1109/43.673632

  • Fang W and Wu A. (2006). A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 16:10. (1188-1195). Online publication date: 1-Nov-2006.

    https://doi.org/10.1109/43.662680

  • Kwon Y and Kyung C. (2005). ATOMi. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13:7. (861-864). Online publication date: 1-Jul-2005.

    https://doi.org/10.1109/TVLSI.2005.850117

  • Mak W. Min-cut partitioning with functional replication for technology mapped circuits using minimum area overhead. Proceedings of the 2001 international symposium on Physical design. (100-105).

    https://doi.org/10.1145/369691.369746

  • Srinivasan V, Govindarajan S and Vemuri R. (2001). Fine-grained and coarse-grained behavioral partitioning with effective utilization of memory and design space exploration for multi-FPGA architectures. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 9:1. (140-159). Online publication date: 1-Feb-2001.

    https://doi.org/10.1109/92.920829

  • Senouci S, Amoura A, Krupnova H and Saucier G. Timing driven floorplanning on programmable hierarchical targets. Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays. (85-92).

    https://doi.org/10.1145/275107.275123

  • Vahid F. I/O and performance tradeoffs with the FunctionBus during multi-FPGA partitioning. Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays. (27-34).

    https://doi.org/10.1145/258305.258309

  • Fang W and Wu A. A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations. Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design. (638-643).

    /doi/10.5555/244522.244946

  • Johannes F. Partitioning of VLSI circuits and systems. Proceedings of the 33rd annual Design Automation Conference. (83-87).

    https://doi.org/10.1145/240518.240535

  • Wen-Jong Fang and Wu A. A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations International Conference on Computer Aided Design. 10.1109/ICCAD.1996.571339. 0-8186-7597-7. (638-643).

    http://ieeexplore.ieee.org/document/571339/