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  • Damsteegt R, Overwater R, Babaie M and Sebastiano F. A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS. IEEE Journal of Solid-State Circuits. 10.1109/JSSC.2024.3385696. 59:7. (2042-2054).

    https://ieeexplore.ieee.org/document/10500491/

  • Min D, Byun I, Lee G and Kim J. (2024). CoolDC: A Cost-Effective Immersion-Cooled Datacenter with Workload-Aware Temperature Scaling. ACM Transactions on Architecture and Code Optimization. 0:0.

    https://doi.org/10.1145/3664925

  • Min D, Kim J, Choi J, Byun I, Tanaka M, Inoue K and Kim J. QIsim: Architecting 10+K Qubit QC Interfaces Toward Quantum Supremacy. Proceedings of the 50th Annual International Symposium on Computer Architecture. (1-16).

    https://doi.org/10.1145/3579371.3589036

  • Shu Y, Zhang H, Sun H, Deng Q and Ha Y. (2023). CSDB-eDRAM: A 16Kb Energy-Efficient 4T CSDB Gain Cell eDRAM with over 16.6s Retention Time and 49.23uW/Kb at 4.2K for Cryogenic Computing 2023 IEEE International Symposium on Circuits and Systems (ISCAS). 10.1109/ISCAS46773.2023.10181628. 978-1-6654-5109-3. (1-5).

    https://ieeexplore.ieee.org/document/10181628/

  • Hankin A, Pentecost L, Min D, Brooks D and Wei G. (2023). Is the Future Cold or Tall? Design Space Exploration of Cryogenic and 3D Embedded Cache Memory 2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). 10.1109/ISPASS57527.2023.00022. 979-8-3503-9739-0. (134-144).

    https://ieeexplore.ieee.org/document/10158184/

  • Byun I, Kim J, Min D, Nagaoka I, Fukumitsu K, Ishikawa I, Tanimoto T, Tanaka M, Inoue K and Kim J. XQsim. Proceedings of the 49th Annual International Symposium on Computer Architecture. (366-382).

    https://doi.org/10.1145/3470496.3527417

  • Das P, Pattison C, Manne S, Carmean D, Svore K, Qureshi M and Delfosse N. (2022). AFS: Accurate, Fast, and Scalable Error-Decoding for Fault-Tolerant Quantum Computers 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA). 10.1109/HPCA53966.2022.00027. 978-1-6654-2027-3. (259-273).

    https://ieeexplore.ieee.org/document/9773217/

  • Min D, Chung Y, Byun I, Kim J and Kim J. CryoWire: wire-driven microarchitecture designs for cryogenic computing. Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems. (903-917).

    https://doi.org/10.1145/3503222.3507749

  • Fu R, Huang J, Wu H, Ye X, Fan D and Ho T. JBNN: A Hardware Design for Binarized Neural Networks using Single-Flux-Quantum Circuits. IEEE Transactions on Computers. 10.1109/TC.2022.3215085. (1-12).

    https://ieeexplore.ieee.org/document/9926189/

  • Garzón E, Teman A and Lanuzza M. (2021). Embedded Memories for Cryogenic Applications. Electronics. 10.3390/electronics11010061. 11:1. (61).

    https://www.mdpi.com/2079-9292/11/1/61

  • Holmes D. (2021). Cryogenic Electronics and Quantum Information Processing 2021 IEEE International Roadmap for Devices and Systems Outbriefs. 10.1109/IRDS54852.2021.00012. 978-1-6654-8638-5. (1-93).

    https://ieeexplore.ieee.org/document/9827535/

  • Zokaee F and Jiang L. SMART: A Heterogeneous Scratchpad Memory Architecture for Superconductor SFQ-based Systolic CNN Accelerators. MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture. (912-924).

    https://doi.org/10.1145/3466752.3480041

  • Garzón E, De Rose R, Crupi F, Trojman L, Teman A and Lanuzza M. (2021). Relaxing non-volatility for energy-efficient DMTJ based cryogenic STT-MRAM. Solid-State Electronics. 10.1016/j.sse.2021.108090. 184. (108090). Online publication date: 1-Oct-2021.

    https://linkinghub.elsevier.com/retrieve/pii/S0038110121001350

  • Kim H, Amarnath A, Bagherzadeh J, Talati N and Dreslinski R. (2021). A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors. ACM Journal on Emerging Technologies in Computing Systems. 17:3. (1-44). Online publication date: 31-Jul-2021.

    https://doi.org/10.1145/3453143

  • Garzon E, Greenblatt Y, Harel O, Lanuzza M and Teman A. Gain-Cell Embedded DRAM Under Cryogenic Operation—A First Study. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 10.1109/TVLSI.2021.3081043. 29:7. (1319-1324).

    https://ieeexplore.ieee.org/document/9442391/

  • Garzon E, De Rose R, Crupi F, Carpentieri M, Teman A and Lanuzza M. Simulation Analysis of DMTJ-Based STT-MRAM Operating at Cryogenic Temperatures. IEEE Transactions on Magnetics. 10.1109/TMAG.2021.3073861. 57:7. (1-6).

    https://ieeexplore.ieee.org/document/9406050/

  • Lee G, Na S, Byun I, Min D and Kim J. CryoGuard. Proceedings of the 48th Annual International Symposium on Computer Architecture. (637-650).

    https://doi.org/10.1109/ISCA52012.2021.00056

  • Byun I, Min D, Lee G, Na S and Kim J. A Next-Generation Cryogenic Processor Architecture. IEEE Micro. 10.1109/MM.2021.3070133. 41:3. (80-86).

    https://ieeexplore.ieee.org/document/9392317/

  • Garzon E, De Rose R, Crupi F, Teman A and Lanuzza M. Exploiting STT-MRAMs for Cryogenic Non-Volatile Cache Applications. IEEE Transactions on Nanotechnology. 10.1109/TNANO.2021.3049694. 20. (123-128).

    https://ieeexplore.ieee.org/document/9316299/

  • Byun I, Min D, Lee G, Na S and Kim J. CryoCore. Proceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture. (335-348).

    https://doi.org/10.1109/ISCA45697.2020.00037