Kafle B, Gange G, Schachte P, Søndergaard H and Stuckey P.
(2017). A Benders Decomposition Approach to Deciding Modular Linear Integer Arithmetic. Theory and Applications of Satisfiability Testing – SAT 2017. 10.1007/978-3-319-66263-3_24. (380-397).
Chihani Z, Marre B, Bobot F and Bardin S.
(2017). Sharpening Constraint Programming Approaches for Bit-Vector Theory. Integration of AI and OR Techniques in Constraint Programming. 10.1007/978-3-319-59776-8_1. (3-20).
Bryant R, Kroening D, Ouaknine J, Seshia S, Strichman O and Brady B.
(2009). An abstraction-based decision procedure for bit-vector arithmetic. International Journal on Software Tools for Technology Transfer (STTT). 11:2. (95-104). Online publication date: 1-Apr-2009.
Bryant R, Kroening D, Ouaknine J, Seshia S, Strichman O and Brady B.
(2009). An abstraction-based decision procedure for bit-vector arithmetic. International Journal on Software Tools for Technology Transfer. 10.1007/s10009-009-0101-x. 11:2. (95-104). Online publication date: 1-Apr-2009.
Mirzaeian S, Feijun Zheng and Cheng K.
(2008). RTL Error Diagnosis Using a Word-Level SAT-Solver 2008 IEEE International Test Conference. 10.1109/TEST.2008.4700568. 978-1-4244-2402-3. (1-8).
Kroening D and Seshia S. Formal verification at higher levels of abstraction. Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design. (572-578).
Bryant R, Kroening D, Ouaknine J, Seshia S, Strichman O and Brady B. Deciding bit-vector arithmetic with abstraction. Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems. (358-372).
Deng S, Wu W and Bian J. Bounded Model Checking Combining Symbolic Trajectory Evaluation Abstraction with Hybrid Three-Valued SAT Solving. Computer Supported Cooperative Work in Design III. 10.1007/978-3-540-72863-4_31. (297-307).
Bryant R, Kroening D, Ouaknine J, Seshia S, Strichman O and Brady B. Deciding Bit-Vector Arithmetic with Abstraction. Tools and Algorithms for the Construction and Analysis of Systems. 10.1007/978-3-540-71209-1_28. (358-372).
Deng S, Wu W and Bian J. Bounded model checking combining symbolic trajectory evaluation abstraction with hybrid three-valued SAT solving. Proceedings of the 10th international conference on Computer supported cooperative work in design III. (297-307).
Ganai M, Talupur M and Gupta A. SDSAT. Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems. (135-150).
Kroening D and Sharygina N. Approximating predicate images for bit-vector logic. Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems. (242-256).
Parthasarathy G, Iyer M, Cheng K and Brewer F. Structural search for RTL with predicate learning. Proceedings of the 42nd annual Design Automation Conference. (451-456).
Parthasarathy G, Iyer M, Cheng K and Brewer F. RTL SAT simplification by Boolean and interval arithmetic reasoning. Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design. (297-302).
Iyer M, Parthasarathy G and Cheng K. Efficient Conflict-Based Learning in an RTL Circuit Constraint Solver. Proceedings of the conference on Design, Automation and Test in Europe - Volume 2. (666-671).