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- research-articleOctober 2024
A Defect Detection Method of Mixed Wafer Map Using Neighborhood Path Filtering Clustering Algorithm
Journal of Electronic Testing: Theory and Applications (JELT), Volume 40, Issue 4Pages 419–433https://doi.org/10.1007/s10836-024-06132-8AbstractAs the wafer process becomes more complex, the probability of mixed-type defective wafer maps is constantly increasing. Therefore, it is necessary to perform effective filtering and denoising processing on the mixed-type defective wafer map to ...
- research-articleMay 2024
Mixed-type wafer defect detection based on multi-branch feature enhanced residual module
Expert Systems with Applications: An International Journal (EXWA), Volume 242, Issue Chttps://doi.org/10.1016/j.eswa.2023.122795Graphical abstractDisplay Omitted
AbstractWafer testing is crucial in semiconductor manufacturing. Accurate identification of wafer defects enables precise localization of manufacturing issues, thereby enhancing chip production yield. Mixed-type wafer defect patterns are complex, ...
- research-articleDecember 2023
Detection Method of Hardware Trojan Based on Attention Mechanism and Residual-Dense-Block under the Markov Transition Field
Journal of Electronic Testing: Theory and Applications (JELT), Volume 39, Issue 5-6Pages 621–629https://doi.org/10.1007/s10836-023-06090-7AbstractSince 2007, methods that utilize side-channel data to detect hardware Trojan (HT) problems have been widely studied. Machine learning methods are widely used for hardware Trojan detection, but with the development of integrated circuits (ICs), ...
- research-articleNovember 2023
Wafer map defect pattern detection method based on improved attention mechanism
Expert Systems with Applications: An International Journal (EXWA), Volume 230, Issue Chttps://doi.org/10.1016/j.eswa.2023.120544AbstractWafer map defect pattern recognition is an indispensable part in the semiconductor manufacturing process. Wafer map defect pattern recognition and classification can locate the cause of failures in the manufacturing process. In this study, we ...
- research-articleNovember 2023
Detection method of Golden Chip-Free Hardware Trojan based on the combination of ResNeXt structure and attention mechanism
AbstractSince 2007, the use of side-channel data to detect hardware Trojans (HT) has been widely studied. Machine learning methods are widely used in the detection of hardware Trojans, but with the development of integrated circuits (IC), machine ...
- research-articleDecember 2022
Wafer map failure pattern recognition based on deep convolutional neural network
Expert Systems with Applications: An International Journal (EXWA), Volume 209, Issue Chttps://doi.org/10.1016/j.eswa.2022.118254Highlights- The systematic failure pattern recognition method for wafer map is explored.
- A ...
The objective of this paper is to propose a systematic failure pattern recognition for wafer map based on neural networks. A deep convolutional neural network (DCNN) model which includes the convolutional layer, batch normalization ...
- research-articleOctober 2019
Research on TSV Void Defects Based on Machine Learning
CSAE '19: Proceedings of the 3rd International Conference on Computer Science and Application EngineeringArticle No.: 75, Pages 1–4https://doi.org/10.1145/3331453.3360965With the rapid development of 3D TSV (through silicon via) technology, it is particularly important to improve the yield for TSV fault detection. Aiming at TSV void defects, the paper adopts supervised machine learning method to train S parameters in ...
- ArticleMarch 2010
Design and implementation of boundary-scan test system based on network interface card
Boundary-Scan Test (BST) technology has been widely used. To further extend the application of BST, a BST system based on network interface card is designed and implemented. In this paper, the theorem of boundary scan test is briefly introduced. The ...
