Export Citations
Save this search
Please login to be able to save your searches and receive alerts for new content matching your search criteria.
- research-articleSeptember 2023
Automated In-Situ Monitoring for Variability-Resilient and Energy-Efficient Digital Circuits Demonstrated on a Viterbi Decoder in 22-nm CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (ITVL), Volume 31, Issue 9Pages 1320–1329https://doi.org/10.1109/TVLSI.2023.3282678The impact of variability in CMOS technology increases with scaling and low-voltage operation, where conventional design flows need to manage large design margins to ensure an acceptable yield. In this article, we present a novel methodology to improve ...
- research-articleMay 2022
Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology
- Arthur Beckers,
- Roel Uytterhoeven,
- Thomas Vandenabeele,
- Jo Vliegen,
- Lennert Wouters,
- Joan Daemen,
- Wim Dehaene,
- Benedikt Gierlichs,
- Nele Mentens
CF '22: Proceedings of the 19th ACM International Conference on Computing FrontiersPages 258–262https://doi.org/10.1145/3528416.3530992This paper is the first to present an implementation of a cryptographic circuit in 28nm FD-SOI using near-threshold design. The implemented cipher, Ketje Jr, is a lightweight authenticated encryption algorithm. The energy consumption of representative ...
- research-articleMarch 2019
Low Voltage Transient RESET Kinetic Modeling of OxRRAM for Neuromorphic Applications
2019 IEEE International Reliability Physics Symposium (IRPS)Pages 1–6https://doi.org/10.1109/IRPS.2019.8720555OxRRAM is being considered as synapse in neuromorphic systems in multiple ways. For analog neural network weight storage, OxRRAM resistance variability poses a significant challenge at low currents. However, alternative ‘cortical’ learning ...
- articleDecember 2018
Architecture optimization for energy-efficient resolution-scalable 8---12-bit SAR ADCs
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 97, Issue 3Pages 437–448https://doi.org/10.1007/s10470-018-1235-0Low power analog-to-digital converters (ADCs) in energy constrained devices, such as wireless sensor readout modules, often target dynamic resolution scalability with application context to reduce the average power consumption. This work implements such ...
- research-articleMay 2017
Multidisciplinary Learning through Implementation of the DVB-S2 Standard
- Yuri Murillo,
- Bertold Van den Bergh,
- Jona Beysens,
- Alexander Bertrand,
- Wim Dehaene,
- Panagiotis Patrinos,
- Tinne Tuytelaars,
- Ruth Vazquez Sabariego,
- Marian Verhelst,
- Patrick Wambacq,
- Sofie Pollin
IEEE Communications Magazine (COMAG), Volume 55, Issue 5Pages 124–130https://doi.org/10.1109/MCOM.2017.1700007Telecommunication standards are documents that contain consolidated knowledge about communication systems and implementation best practices. They are created based on long consensus processes in order to meet practical constraints. This article ...
-
- research-articleApril 2017
SRAM enablement beyond N7: A BTI study
- M. K. Gupta,
- P. Weckx,
- S. Cosemans,
- P. Schuddinck,
- R. Baert,
- D. Jang,
- Y. Sherazi,
- P. Raghavan,
- B. Kaczer,
- A. Spessot,
- A. Mocuta,
- W. Dehaene
2017 IEEE International Reliability Physics Symposium (IRPS)Pages CR-4.1–CR-4.6https://doi.org/10.1109/IRPS.2017.7936353Operating voltage (Vmin) improvement for High density SRAM with scaling is halted due to variability and aging effects which becomes a bottleneck for energy optimized operation. Device level and cell level advancements help the SRAM in lowering Vmin. ...
- research-articleApril 2017
- research-articleMarch 2017
Mitigation of sense amplifier degradation using input switching
- Daniël Kraak,
- Innocent Agbo,
- Mottaqiallah Taouil,
- Pieter Weckx,
- Stefan Cosemans,
- Francky Catthoor,
- Said Hamdioui,
- Wim Dehaene
To compensate for time-zero (due to process variation) and time-dependent (due to e.g. Bias Temperature Instability (BTI)) variability, designers usually add design margins. Due to technology scaling, these variabilities become worse, leading to the ...
- research-articleMarch 2017
DVAFS: trading computational accuracy for energy through dynamic-voltage-accuracy-frequency-scaling
Several applications in machine learning and machine-to-human interactions tolerate small deviations in their computations. Digital systems can exploit this fault-tolerance to increase their energy-efficiency, which is crucial in embedded applications. ...
- research-articleMarch 2017
Massive MIMO processing at the semiconductor edge: Exploiting the system and circuit margins for power savings
2017 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)Pages 3474–3478https://doi.org/10.1109/ICASSP.2017.7952802Massive MIMO has the potential to bring great spectral and energy efficiency improvements, making it a very promising technology for future wireless systems. Essential to achieve the gains in practice, is the ability to realize the many antenna paths at ...
- articleFebruary 2017
High-speed single cable synchronization system for data-converters
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 90, Issue 2Pages 283–290https://doi.org/10.1007/s10470-016-0899-6A clock-cycle accurate synchronization technique for fully integrated data-converters is presented. Only a single cable is needed to distribute both the required synchronization signal and the converter clock. Different possible implementations, both to ...
- research-articleMarch 2016
TOTAL: TRNG on-the-fly testing for attack detection using lightweight hardware
We present a design methodology for embedded tests of entropy sources. These tests are necessary to detect attacks and failures of true random number generators. The central idea of this work is to use an empirical design methodology consisting of two ...
- research-articleJune 2015
Highly efficient entropy extraction for true random number generators on FPGAs
DAC '15: Proceedings of the 52nd Annual Design Automation ConferenceArticle No.: 116, Pages 1–6https://doi.org/10.1145/2744769.2744852True random number generators are essential components in cryptographic hardware. In this work, a novel entropy extraction method is used to improve throughput of jitter-based true random number generators on FPGA. By utilizing ultra-fast carry-logic ...
- research-articleMarch 2015
Impact of interconnect multiple-patterning variability on SRAMs
- Ioannis Karageorgos,
- Michele Stucchi,
- Praveen Raghavan,
- Julien Ryckaert,
- Zsolt Tokei,
- Diederik Verkest,
- Rogier Baert,
- Sushil Sakhare,
- Wim Dehaene
DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & ExhibitionPages 609–612The introduction of Multiple Patterning (MP) in sub-32nm technology nodes may pose severe variability problems in wire resistance and capacitance of IC circuits. In this paper we evaluate the impact of this variability on the performance of SRAM cell ...
- research-articleMarch 2015
Embedded HW/SW platform for on-the-fly testing of true random number generators
DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & ExhibitionPages 345–350We present a HW/SW platform for on-the-fly detection of failures and weaknesses in entropy sources. By splitting the operations between hardware and software, we achieve sufficient flexibility to control the level of significance of the tests. This ...
- articleJanuary 2015
Impact analysis of deep-submicron CMOS technologies on the voltage and temperature independence of a time-domain sensor interface
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 82, Issue 1Pages 285–296https://doi.org/10.1007/s10470-014-0452-4This article presents a comparative study of a time-based sensor interface implemented in two standard CMOS technologies, 130 and 40 nm. The interface uses a ring oscillator to generate a pulse-width modulated signal of which the duty cycle is ...
- articleSeptember 2014
A remotely-powered, 20 Mb/s, 5.35 pJ/bit impulse-UWB WSN tag for cm-accurate-localization sensor networks
- Hans Danneels,
- Valentijn De Smedt,
- Christophe De Roover,
- Cedric Walravens,
- Soheil Radiom,
- Marian Verhelst,
- Michiel Steyaert,
- Wim Dehaene,
- Georges Gielen
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 80, Issue 3Pages 531–540https://doi.org/10.1007/s10470-014-0321-1This paper presents an ultra-low-power, low-voltage sensor node for wireless sensor networks. The node scavenges RF energy out of the environment, resulting in a limited available power budget and causing an unstable supply voltage. Hence, accurate and ...
- bookAugust 2014
SRAM Design for Wireless Sensor Networks: Energy Efficient and Variability Resilient Techniques
This book features various, ultra low energy, variability resilient SRAM circuit design techniques for wireless sensor network applications. Conventional SRAM design targets area efficiency and high performance at the increased cost of energy ...
- posterMay 2014
Modelling and mitigation of time-zero variability in sub-16nm finfet-based STT-MRAM memories
GLSVLSI '14: Proceedings of the 24th edition of the great lakes symposium on VLSIPages 243–244https://doi.org/10.1145/2591513.2591573Spin-transfer torque magnetic RAM (STT-MRAM) is one of the most promising non-volatile memory technologies and shows potential as an SRAM replacement. However, targeted for advanced CMOS technologies such as the 14nm FinFET node, time-zero variability ...
- research-articleFebruary 2014
Low-Power Digital Signal Processor Architecture for Wireless Sensor Nodes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (ITVL), Volume 22, Issue 2Pages 313–321https://doi.org/10.1109/TVLSI.2013.2238645Radio communication exhibits the highest energy consumption in wireless sensor nodes. Given their limited energy supply from batteries or scavenging, these nodes must trade data communication for on-the-node computation. Currently, they are designed ...