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- ArticleJuly 2024
A High-Throughput FPGA-Based Elliptic Curve Digital Signature Core for IoT Edge Platforms
Computational Science and Its Applications – ICCSA 2024 WorkshopsPages 31–43https://doi.org/10.1007/978-3-031-65285-1_3AbstractInformation security is significant in many aspects, especially in IoT applications such as healthcare or monitoring. Therefore, cryptography algorithms are usually deployed on IoT edge platforms to ensure the integrity and safety of information. ...
- ArticleJuly 2023
FPGA-Enabled Efficient Framework for High-Performance Intrusion Prevention Systems
Computational Science and Its Applications – ICCSA 2023 WorkshopsPages 83–98https://doi.org/10.1007/978-3-031-37120-2_6AbstractWith the rapid increase of network-based services during and after the COVID-19 pandemic, preventing network attacks is an essential demand. This paper proposes an efficient FPGA-based framework for developing high-performance intrusion prevention ...
- research-articleMay 2023
Robust 3D Beamforming for Secure UAV Communications by DAE
- Cuong Pham-Quoc,
- Vien Nguyen-Duy-Nhat,
- Mai T. P. Le,
- Hung Nguyen-Le,
- Chien Tang-Tan,
- Tuan Tang-Anh,
- Nghia Nguyen-Xuan
Mobile Networks and Applications (MNET), Volume 28, Issue 3Pages 1197–1205https://doi.org/10.1007/s11036-023-02130-wAbstractUnmanned aerial vehicles (UAVs) are considered to play vital roles in the Sixth Generation (6G) networks and beyond. However, the confidentiality of UAV communication is sensitive to security threats owing to the broadcast nature and principal ...
- research-articleOctober 2022
Towards An FPGA-targeted Hardware/Software Co-design Framework for CNN-based Edge Computing
Mobile Networks and Applications (MNET), Volume 27, Issue 5Pages 2024–2035https://doi.org/10.1007/s11036-022-01985-9AbstractIn recent years, AI-based applications have been used more frequently in many different areas. More and more convolutional neural network models for AI applications have been proposed to improve accuracy compared to other methods like pattern ...
- research-articleJune 2020
Heterogeneous Hardware-based Network Intrusion Detection System with Multiple Approaches for SDN
Mobile Networks and Applications (MNET), Volume 25, Issue 3Pages 1178–1192https://doi.org/10.1007/s11036-019-01437-xAbstractSoftware-Defined Networking has became one of the most efficient network architectures to deal with complexity, policy control improvement, and vendor dependencies removal. Besides, with the diversity of network attacks, the SDN architecture faces ...
- research-articleJune 2020
Hardware-assisted High-performance DNA Alignment System
ICIIT '20: Proceedings of the 2020 5th International Conference on Intelligent Information TechnologyPages 45–50https://doi.org/10.1145/3385209.3385223The investigations of DNA become more and more important in this era. A plethora of new algorithms that were published over the last decade are apparent evidences for this fact. In the DNA's researches, alignment is one of the most important steps that ...
- research-articleJanuary 2018
An Efficient High-Throughput and Low-Latency SYN Flood Defender for High-Speed Networks
As one of the main types of Distributed Denial of Service (DDoS) attacks, SYN flood attacks have caused serious issues for servers when legitimate clients may be denied connections. There is an essential demand for a sufficient approach to mitigate SYN ...
- research-articleJanuary 2017
FPGA-based Multicore Architecture for Integrating Multiple DDoS Defense Mechanisms
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 4Pages 14–19https://doi.org/10.1145/3039902.3039906This paper proposes an FPGA-based multicore architecture to integrate multiple DDoS defense mechanisms for DDoS protection. The architecture allows multiple cooperating DDoS mitigation techniques to classify incoming network packets. The proposed ...
- ArticleNovember 2015
Heterogeneous Hardware Accelerators with Hybrid Interconnect: An Automated Design Approach
ACOMP '15: Proceedings of the 2015 International Conference on Advanced Computing and Applications (ACOMP)Pages 59–66https://doi.org/10.1109/ACOMP.2015.26Although heterogeneous multicore systems are widely used in both academia and industry, system performance of such systems does not scale when increasing the number of processing cores. The main reason is due to the communication overhead which ...
- ArticleMay 2014
Automated Hybrid Interconnect Design for FPGA Accelerators Using Data Communication Profiling
IPDPSW '14: Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium WorkshopsPages 151–160https://doi.org/10.1109/IPDPSW.2014.21In this paper, we introduce an automated interconnect design strategy to create an efficient custom interconnect for kernels in an FPGA-based accelerator system to accelerate their communication behavior. Our custom interconnect includes an NoC, shared ...
- research-articleMarch 2013
Hybrid interconnect design for heterogeneous hardware accelerators
The communication infrastructure is one of the important components of a multicore system along with the computing cores and memories. A good interconnect design plays a key role in improving the performance of such systems. In this paper, we introduce ...
- ArticleJanuary 2010
Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA
DELTA '10: Proceedings of the 2010 Fifth IEEE International Symposium on Electronic Design, Test & ApplicationsPages 289–292https://doi.org/10.1109/DELTA.2010.40Asynchronous circuits are more and more predominant because their advantages in comparison with synchronous circuits. While asynchronous circuits can be implemented in custom VLSI, their fabricated-time is too long to allow rapid prototyping. Meanwhile, ...