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- research-articleDecember 2024
PIM-Potential: Broadening the Acceleration Reach of PIM Architectures
MEMSYS '24: Proceedings of the International Symposium on Memory SystemsPages 1–12https://doi.org/10.1145/3695794.3695795Continual demand for memory bandwidth has made it worthwhile for memory vendors to reassess processing in memory (PIM), which enables higher bandwidth by placing compute units in/near-memory. As such, memory vendors have recently proposed commercially ...
- research-articleApril 2024
T3: Transparent Tracking & Triggering for Fine-grained Overlap of Compute & Collectives
ASPLOS '24: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2Pages 1146–1164https://doi.org/10.1145/3620665.3640410Large Language Models increasingly rely on distributed techniques for their training and inference. These techniques require communication across devices which can reduce scaling efficiency as the number of devices increases. While some distributed ...
- research-articleJune 2023
A Research Retrospective on AMD's Exascale Computing Journey
- Gabriel H. Loh,
- Michael J. Schulte,
- Mike Ignatowski,
- Vignesh Adhinarayanan,
- Shaizeen Aga,
- Derrick Aguren,
- Varun Agrawal,
- Ashwin M. Aji,
- Johnathan Alsop,
- Paul Bauman,
- Bradford M. Beckmann,
- Majed Valad Beigi,
- Sergey Blagodurov,
- Travis Boraten,
- Michael Boyer,
- William C. Brantley,
- Noel Chalmers,
- Shaoming Chen,
- Kevin Cheng,
- Michael L. Chu,
- David Cownie,
- Nicholas Curtis,
- Joris Del Pino,
- Nam Duong,
- Alexandru Duțu,
- Yasuko Eckert,
- Christopher Erb,
- Chip Freitag,
- Joseph L. Greathouse,
- Sudhanva Gurumurthi,
- Anthony Gutierrez,
- Khaled Hamidouche,
- Sachin Hossamani,
- Wei Huang,
- Mahzabeen Islam,
- Nuwan Jayasena,
- John Kalamatianos,
- Onur Kayiran,
- Jagadish Kotra,
- Alan Lee,
- Daniel Lowell,
- Niti Madan,
- Abhinandan Majumdar,
- Nicholas Malaya,
- Srilatha Manne,
- Susumu Mashimo,
- Damon McDougall,
- Elliot Mednick,
- Michael Mishkin,
- Mark Nutter,
- Indrani Paul,
- Matthew Poremba,
- Brandon Potter,
- Kishore Punniyamurthy,
- Sooraj Puthoor,
- Steven E. Raasch,
- Karthik Rao,
- Gregory Rodgers,
- Marko Scrbak,
- Mohammad Seyedzadeh,
- John Slice,
- Vilas Sridharan,
- René van Oostrum,
- Eric van Tassell,
- Abhinav Vishnu,
- Samuel Wasmundt,
- Mark Wilkening,
- Noah Wolfe,
- Mark Wyse,
- Adithya Yalavarti,
- Dmitri Yudanov
ISCA '23: Proceedings of the 50th Annual International Symposium on Computer ArchitectureArticle No.: 81, Pages 1–14https://doi.org/10.1145/3579371.3589349The pace of advancement of the top-end supercomputers historically followed an exponential curve similar to (and driven in part by) Moore's Law. Shortly after hitting the petaflop mark, the community started looking ahead to the next milestone: Exascale. ...
- research-articleMarch 2021
Dynamically Adapting Page Migration Policies Based on Applications’ Memory Access Behaviors
ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 17, Issue 2Article No.: 16, Pages 1–24https://doi.org/10.1145/3444750There have been numerous studies on heterogeneous memory systems comprised of faster DRAM (e.g., 3D stacked HBM or HMC) and slower non-volatile memories (e.g., PCM, STT-RAM). However, most of these studies focused on static policies for managing data ...
- research-articleJanuary 2020
On-the-fly Page Migration and Address Reconciliation for Heterogeneous Memory Systems
ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 16, Issue 1Article No.: 10, Pages 1–27https://doi.org/10.1145/3364179For efficient placement of data in flat-address heterogeneous memory systems consisting of fast (e.g., 3D-DRAM) and slow memories (e.g., NVM), we present a hardware-based page migration technique. Unlike epoch-based approaches that migrate heavily ...
- research-articleApril 2017
Exploring the Processing-in-Memory design space
Journal of Systems Architecture: the EUROMICRO Journal (JOSA), Volume 75, Issue CPages 59–67https://doi.org/10.1016/j.sysarc.2016.08.001With the emergence of 3D-DRAM, Processing-in-Memory has once more become of great interest to the research community and industry. Here we present our observations on a subset of the PIM design space. We show how the architectural choices for PIM core ...
- research-articleOctober 2016
Prefetching as a Potentially Effective Technique for Hybrid Memory Optimization
MEMSYS '16: Proceedings of the Second International Symposium on Memory SystemsPages 220–231https://doi.org/10.1145/2989081.2989129The promise of 3D-stacked memory solving the memory wall has led to many emerging architectures that integrate 3D-stacked memory into processor memory in a variety of ways including systems that utilize different memory technologies, with different ...
- articleJanuary 2007
Mathematical morphology based automated control point detection from human facial image
The ultimate goal of this research is to incorporate facial animation based on image morphing in a very narrow bandwidth video transmission, especially in video conferencing, news telecast etc., where the background as well as the object in the image ...