research-article

To SAT or not to SAT: Ashenhurst decomposition in a large scale

Authors:

Jie-Hong R. Jiang,

Ruei-Rung LeeAuthors Info & Claims

ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design

Pages 32 - 37

Published: 10 November 2008 Publication History

Abstract

Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not scale well to large Boolean functions. Variable partitioning has to be specified a priori and often restricted to a few bound-set variables. Moreover, non-disjoint decomposition requires substantial sophistication. This paper shows that, when Ashenhurst decomposition (the simplest and preferable functional decomposition) is considered, both single and multiple-output decomposition can be formulated with satisfiability solving, Craig interpolation, and functional dependency. Variable partitioning can be automated and integrated into the decomposition process without the bound-set size restriction. The computation naturally extends to nondisjoint decomposition. Experimental results show that the proposed method can effectively decompose functions with up to 300 input variables.

References

[1]

R. L. Ashenhurst. The decomposition of switching functions. Computation Lab, Harvard University, Vol. 29, pp.74--116, 1959.

[2]

Berkeley Logic Synthesis and Verification Group. ABC: A system for sequential synthesis and verification. http://www.eecs.berkeley.edu/~alanmi/abc/

[3]

J. Cong and Y.-Y. Hwang. Boolean matching for LUT-based logic blocks with applications to architecture evaluation and technology mapping. IEEE Transactions on Computer-Aided Design of Integrated Circuits, 20(9):1077--1090, 2001.

Digital Library

[4]

W. Craig. Linear reasoning: A new form of the Herbrand-Gentzen theorem. J. Symbolic Logic, 22(3):250--268, 1957.

[5]

A. Curtis. New Approach to the Design of Switching Circuits. Van Nostrand, Princeton, NJ, 1962.

[6]

N. Eén and N. Söensson. An extensible SAT-solver. In Proc. SAT, pp.502--518, 2003.

[7]

J.-H. R. Jiang and R. K. Brayton. Functional dependency for verification reduction. In Proc. CAV, pp.268--280, 2004.

[8]

J.-H. R. Jiang, J.-Y. Jou, and J.-D. Huang. Compatible class encoding in hyper-function decomposition for FPGA synthesis. In Proc. DAC, pp.712--717, 1998.

Digital Library

[9]

R. M. Karp. Functional decomposition and switching circuit design. J. Soc. Ind. Appl. Math. 11(2):291V335, 1963.

[10]

C.-C. Lee, J.-H. R. Jiang, C.-Y. Huang, and A. Mishchenko. Scalable exploration of functional dependency by interpolation and incremental SAT solving. In Proc. ICCAD, pp.227--233, 2007.

Digital Library

[11]

R.-R. Lee, J.-H. R. Jiang, and W.-L. Hung. Bi-decomposing large Boolean functions via interpolation and satisfiability solving. In Proc. DAC, 2008.

Digital Library

[12]

A. Ling, D. Singh, and S. Brown. FPGA technology mapping: A study of optimality. In Proc. DAC, pp.427--432, 2005.

Digital Library

[13]

K. L. McMillan. Interpolation and SAT-based model checking. In Proc. CAV, pp.1--13, 2003.

[14]

C. Scholl. Functional Decomposition with Applications to FPGA Synthesis. Kluwer Academic Publishers, 2001.

Digital Library

[15]

G. Tseitin. On the complexity of derivation in propositional calculus. Studies in Constructive Mathematics and Mathematical Logic, pp.466--483, 1970.

[16]

B. Wurth, U. Schlichtmann, K. Eckl, and K. Antreich. Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs. ACM Trans. on Design Automation of Electronic Systems, 4(3):313--350, 1999.

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Cited By

Li YTsai EPerkowski MSong X(2019)Grover-based ashenhurst-curtis decomposition using quantum language quipperQuantum Information & Computation10.5555/3370239.337024319:1-2(35-66)Online publication date: 1-Feb-2019
https://dl.acm.org/doi/10.5555/3370239.3370243
Mishchenko ABrayton RPetkovska ASoeken MAmarú LDomic A(2018)Canonical computation without canonical representationProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196006(1-6)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1145/3195970.3196006
Petkovska ANovo DMishchenko AIenne PChang Y(2014)Constrained interpolation for guided logic synthesisProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691459(462-469)Online publication date: 3-Nov-2014
https://dl.acm.org/doi/10.5555/2691365.2691459
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Published In

cover image ACM Conferences

ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design

November 2008

855 pages

ISBN:9781424428205

General Chair:
Sani R. Nassif
IBM Austin Research Lab, Austin Texas
,
Program Chair:
Jaijeet Roychowdhury
Univ. of Minnesota, Minneapolis, MN

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE Council on Electronic Design Automation (CEDA)
IEEE CASS/CANDE

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IEEE Press

Publication History

Published: 10 November 2008

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ASE08

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SIGDA

ASE08: The International Conference on Computer-Aided Design

November 10 - 13, 2008

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Li YTsai EPerkowski MSong X(2019)Grover-based ashenhurst-curtis decomposition using quantum language quipperQuantum Information & Computation10.5555/3370239.337024319:1-2(35-66)Online publication date: 1-Feb-2019
https://dl.acm.org/doi/10.5555/3370239.3370243
Mishchenko ABrayton RPetkovska ASoeken MAmarú LDomic A(2018)Canonical computation without canonical representationProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196006(1-6)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1145/3195970.3196006
Petkovska ANovo DMishchenko AIenne PChang Y(2014)Constrained interpolation for guided logic synthesisProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691459(462-469)Online publication date: 3-Nov-2014
https://dl.acm.org/doi/10.5555/2691365.2691459
Scholl CPigorsch FDisch SAlthaus EFettweis GNebel W(2014)Simple interpolants for linear arithmeticProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616747(1-6)Online publication date: 24-Mar-2014
https://dl.acm.org/doi/10.5555/2616606.2616747
Wu CWu CLai CHuang C(2013)A counterexample-guided interpolant generation algorithm for SAT-based model checkingProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488879(1-6)Online publication date: 29-May-2013
https://dl.acm.org/doi/10.1145/2463209.2488879
Chen HMarques-Silva JBrunvard EStevens KCavallaro JZhang T(2012)New & improved models for SAT-based bi-decompositionProceedings of the great lakes symposium on VLSI10.1145/2206781.2206817(141-146)Online publication date: 3-May-2012
https://dl.acm.org/doi/10.1145/2206781.2206817
Choudhury MMohanram KScheffer LPhillips JHu A(2010)Bi-decomposition of large Boolean functions using blocking edge graphsProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133553(586-591)Online publication date: 7-Nov-2010
https://dl.acm.org/doi/10.5555/2133429.2133553
Jiang JLin HHung WRoychowdhury J(2009)Interpolating functions from large Boolean relationsProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687544(779-784)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687544

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