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Cong JWu CSapatnekar SPedram M(2002)Global clustering-based performance-driven circuit partitioningProceedings of the 2002 international symposium on Physical design10.1145/505388.505424(149-154)Online publication date: 7-Apr-2002
https://dl.acm.org/doi/10.1145/505388.505424
Cong JLim SWu CDe Micheli G(2000)Performance driven multi-level and multiway partitioning with retimingProceedings of the 37th Annual Design Automation Conference10.1145/337292.337418(274-279)Online publication date: 1-Jun-2000
https://dl.acm.org/doi/10.1145/337292.337418
Fang WWu AChawla BBryant RRabaey J(1998)Performance-driven multi-FPGA partitioning using functional clustering and replicationProceedings of the 35th annual Design Automation Conference10.1145/277044.277125(283-286)Online publication date: 1-May-1998
https://dl.acm.org/doi/10.1145/277044.277125
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ICCAD '96: Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design

Logic replication has been shown to be very effective in reducing the number of cut nets in partitioned circuits. Liu et al. considered the circuit partitioning problem with logic replication for separating two given nodes and presented an algorithm to ...
Performance driven circuit partitioning

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ICCAD '93: Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

November 1993

781 pages

ISBN:0818644907

Chairmen:
Michael Lightner
Univ. of Colorado, Boulder
,
Jochen A. G. Jess
Eindhoven Univ. of Tech., Eindhoven, The Netherlands

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IEEE Computer Society Press

Washington, DC, United States

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Published: 07 November 1993

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ICCAD '93: International Conference on Computer Aided Design

November 7 - 11, 1993

California, Santa Clara, USA

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Cong JWu CSapatnekar SPedram M(2002)Global clustering-based performance-driven circuit partitioningProceedings of the 2002 international symposium on Physical design10.1145/505388.505424(149-154)Online publication date: 7-Apr-2002
https://dl.acm.org/doi/10.1145/505388.505424
Cong JLim SWu CDe Micheli G(2000)Performance driven multi-level and multiway partitioning with retimingProceedings of the 37th Annual Design Automation Conference10.1145/337292.337418(274-279)Online publication date: 1-Jun-2000
https://dl.acm.org/doi/10.1145/337292.337418
Fang WWu AChawla BBryant RRabaey J(1998)Performance-driven multi-FPGA partitioning using functional clustering and replicationProceedings of the 35th annual Design Automation Conference10.1145/277044.277125(283-286)Online publication date: 1-May-1998
https://dl.acm.org/doi/10.1145/277044.277125
Behrens DHarbich KBarke ERutenbar ROtten R(1997)Hierarchical partitioningProceedings of the 1996 IEEE/ACM international conference on Computer-aided design10.5555/244522.244861(470-477)Online publication date: 1-Jan-1997
https://dl.acm.org/doi/10.5555/244522.244861
Johannes FPennino TYoffa E(1996)Partitioning of VLSI circuits and systemsProceedings of the 33rd annual Design Automation Conference10.1145/240518.240535(83-87)Online publication date: 1-Jun-1996
https://dl.acm.org/doi/10.1145/240518.240535
Liu LShih MCheng CLorenzetti M(1994)Data flow partitioning for clock period and latency minimizationProceedings of the 31st annual Design Automation Conference10.1145/196244.196605(658-663)Online publication date: 6-Jun-1994
https://dl.acm.org/doi/10.1145/196244.196605

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Performance-driven partitioning using retiming and replication

Minimum replication min-cut partitioning

Performance driven circuit partitioning

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