Article

Timed Moore Automata: Test Data Generation and Model Checking

Authors:

Helge Löding,

Jan PeleskaAuthors Info & Claims

ICST '10: Proceedings of the 2010 Third International Conference on Software Testing, Verification and Validation

Pages 449 - 458

https://doi.org/10.1109/ICST.2010.60

Published: 06 April 2010 Publication History

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Abstract

In this paper we introduce Timed Moore Automata, a specification formalism which is used in industrial train control applications for specifying the real-time behavior of cooperating reactive software components. We define an operational semantics for the sequential components (units) with an abstraction of time that is suitable for checking timeout behavior of these units. A model checking algorithm for live lock detection is presented, and two alternative methods of test case/test data generation techniques are introduced. The first one is based on Kripke structures as used in explicit model checking, while the second method does not require an explicit representation but relies on SAT solving techniques.

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(2016)Validation process for railway interlocking systemsScience of Computer Programming10.1016/j.scico.2016.04.004128:C(2-21)Online publication date: 15-Oct-2016
https://dl.acm.org/doi/10.1016/j.scico.2016.04.004
Nielsen CLarsen PFitzgerald JWoodcock JPeleska J(2015)Systems of Systems EngineeringACM Computing Surveys10.1145/279438148:2(1-41)Online publication date: 24-Sep-2015
https://dl.acm.org/doi/10.1145/2794381
Peleska JHonisch ALapschies FLöding HSchmid HSmuda PVorobev EZahlten C(2011)A real-world benchmark model for testing concurrent real-time systems in the automotive domainProceedings of the 23rd IFIP WG 6.1 international conference on Testing software and systems10.5555/2075545.2075556(146-161)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2075545.2075556

Index Terms

Timed Moore Automata: Test Data Generation and Model Checking
1. Software and its engineering
  1. Software organization and properties
    1. Software functional properties
      1. Formal methods
        Model checking

Index terms have been assigned to the content through auto-classification.

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ICST '10: Proceedings of the 2010 Third International Conference on Software Testing, Verification and Validation

April 2010

518 pages

ISBN:9780769539904

Publisher

IEEE Computer Society

United States

Publication History

Published: 06 April 2010

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Cited By

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(2016)Validation process for railway interlocking systemsScience of Computer Programming10.1016/j.scico.2016.04.004128:C(2-21)Online publication date: 15-Oct-2016
https://dl.acm.org/doi/10.1016/j.scico.2016.04.004
Nielsen CLarsen PFitzgerald JWoodcock JPeleska J(2015)Systems of Systems EngineeringACM Computing Surveys10.1145/279438148:2(1-41)Online publication date: 24-Sep-2015
https://dl.acm.org/doi/10.1145/2794381
Peleska JHonisch ALapschies FLöding HSchmid HSmuda PVorobev EZahlten C(2011)A real-world benchmark model for testing concurrent real-time systems in the automotive domainProceedings of the 23rd IFIP WG 6.1 international conference on Testing software and systems10.5555/2075545.2075556(146-161)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2075545.2075556

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Interrupt Timed Automata: verification and expressiveness

Checking timed Büchi automata emptiness on simulation graphs

Compositional Abstraction Refinement for Timed Systems

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