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DeepSwapper: A Deep Learning Based Page Swap Management Scheme for Hybrid Memory Systems

Authors:

Majed Valad Beigi,

Bahareh Pourshirazi,

Gokhan Memik,

Zhichun ZhuAuthors Info & Claims

PACT '20: Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques

Pages 353 - 354

https://doi.org/10.1145/3410463.3414672

Published: 30 September 2020 Publication History

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Abstract

In this paper, we introduce DeepSwapper, a deep learning-based page swap management scheme that utilizes RNN to perform fast, energy-efficient, and temperature-aware page swapping in hybrid memory systems. DeepSwapper comprises of LSTM units of RNN model to predict the future memory accesses to guide its swap management scheme, a dynamic page swap management scheme that utilizes DRAM capacity efficiently by enabling hot pages in a swap group to be swapped with cold pages of another swap group, and a temperature-aware page swap management scheme, which first predicts the future writes to NVM pages and then, decides to migrate those pages with frequent writes in hot NVM banks to DRAM to enhance the NVM lifetime.

References

[1]

M. Hashemi, K. Swersky, J. A. Smith, G. Ayers, H. Litz, J. Chang, C. Kozyrakis, and P. Ranganathan. Learning Memory Access Patterns. In Proceedings of the 35th International Conference on Machine Learning (ICML), pages 1924--1933, 2018.

Google Scholar

[2]

Z. Shi, X. Huang, A. Jain, and C. Lin. Applying Deep Learning to the Cache Replacement Problem. In Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) pages 413--425, 2019.

Digital Library

Google Scholar

[3]

M. Valad Beigi, and G. Memik. THOR: THermal-aware Optimizations for extending ReRAM lifetime. In Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS), pages 670--679, 2018.

Crossref

Google Scholar

[4]

J. Sim, A. R. Alameldeen, Z. Chishti, C. Wilkerson, and H. Kim. Transparent Hardware Management of Stacked DRAM as Part of Memory. In Proceedings of the 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pages 13--24, 2014.

Digital Library

Google Scholar

[5]

A. Prodromou, M. Meswani, N. Jayasena, G. Loh, and D. M. Tullsen. MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories. In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA), pages 433--444, 2017.

Crossref

Google Scholar

Cited By

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Pei SQin WLi JTan JTang JGaudiot J(2024)Intelligent Page Migration on Heterogeneous Memory by Using TransformerInternational Journal of Parallel Programming10.1007/s10766-024-00776-x52:5-6(380-399)Online publication date: 12-Sep-2024
https://doi.org/10.1007/s10766-024-00776-x
Sun YYuan YYu ZKuper RSong CHuang JJi HAgarwal SLou JJeong IWang RAhn JXu TKim N(2023)Demystifying CXL Memory with Genuine CXL-Ready Systems and DevicesProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614256(105-121)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3614256
Smagulova KFouda MKurdahi FSalama KEltawil A(2023)Resistive Neural Hardware AcceleratorsProceedings of the IEEE10.1109/JPROC.2023.3268092111:5(500-527)Online publication date: May-2023
https://doi.org/10.1109/JPROC.2023.3268092

Index Terms

DeepSwapper: A Deep Learning Based Page Swap Management Scheme for Hybrid Memory Systems
1. Computer systems organization
  1. Architectures
  2. Dependable and fault-tolerant systems and networks
    1. Processors and memory architectures

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Published In

PACT '20: Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques

September 2020

505 pages

ISBN:9781450380751

DOI:10.1145/3410463

General Chair:
Vivek Sarkar
Georgia Institute of Technology
,
Program Chair:
Hyesoon Kim
Georgia Institute of Technology

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 September 2020

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PACT '20

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SIGARCH

PACT '20: International Conference on Parallel Architectures and Compilation Techniques

October 3 - 7, 2020

GA, Virtual Event, USA

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Overall Acceptance Rate 121 of 471 submissions, 26%

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PACT '24

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International Conference on Parallel Architectures and Compilation Techniques

October 13 - 16, 2024

Long Beach , CA , USA

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Cited By

View all

Pei SQin WLi JTan JTang JGaudiot J(2024)Intelligent Page Migration on Heterogeneous Memory by Using TransformerInternational Journal of Parallel Programming10.1007/s10766-024-00776-x52:5-6(380-399)Online publication date: 12-Sep-2024
https://doi.org/10.1007/s10766-024-00776-x
Sun YYuan YYu ZKuper RSong CHuang JJi HAgarwal SLou JJeong IWang RAhn JXu TKim N(2023)Demystifying CXL Memory with Genuine CXL-Ready Systems and DevicesProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614256(105-121)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3614256
Smagulova KFouda MKurdahi FSalama KEltawil A(2023)Resistive Neural Hardware AcceleratorsProceedings of the IEEE10.1109/JPROC.2023.3268092111:5(500-527)Online publication date: May-2023
https://doi.org/10.1109/JPROC.2023.3268092
Pei SLi JQian YTang JGaudiot J(2022)TransMigrator: A Transformer-Based Predictive Page Migration Mechanism for Heterogeneous MemoryNetwork and Parallel Computing10.1007/978-3-031-21395-3_17(180-191)Online publication date: 1-Dec-2022
https://doi.org/10.1007/978-3-031-21395-3_17

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