Article

Multi-objective design space exploration using genetic algorithms

Authors:

Maurizio Palesi,

Tony GivargisAuthors Info & Claims

CODES '02: Proceedings of the tenth international symposium on Hardware/software codesign

Pages 67 - 72

https://doi.org/10.1145/774789.774804

Published: 06 May 2002 Publication History

Abstract

In this work, we provide a technique for efficiently exploring a parameterized system-on-a-chip (SoC) architecture to find all Pareto-optimal configurations in a multi-objective design space. Globally, our approach uses a parameter dependency model of our target parameterized SoC architecture to extensively prune non-optimal sub-spaces. Locally, our approach applies Genetic Algorithms (GAs) to discover Pareto-optimal configurations within the remaining design points. The computed Pareto-optimal configurations will represent the range of performance (e.g., timing and power) tradeoffs that are obtainable by adjusting parameter values for a fixed application that is mapped on the parameterized SoC architecture. We have successfully applied our technique to explore Pareto-optimal configurations for a number of applications mapped on a parameterized SoC architecture.

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Cited By

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Fu VZaourar LMunier-Kordon ADuranton M(2024)Design Space Exploration of HPC Systems with Random Forest-based Bayesian OptimizationProceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design10.1145/3642921.3642923(9-15)Online publication date: 18-Jan-2024
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Multi-objective design space exploration using genetic algorithms

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cover image ACM Conferences

CODES '02: Proceedings of the tenth international symposium on Hardware/software codesign

May 2002

232 pages

ISBN:1581135424

DOI:10.1145/774789

General Chairs:
Joerg Henkel
C & C Research Labs, NEC
,
Xiaobo Sharon Hu
University of Notre Dame
,
Program Chairs:
Rajesh Gupta
University of California, Irvine
,
Sri Parameswaran
University of New South Wales, Australia

Copyright © 2002 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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IFIP WG 10.5: IFIP WG 10.5
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SIGDA: ACM Special Interest Group on Design Automation
SIGSOFT: ACM Special Interest Group on Software Engineering
IEEE-CS\DATC: IEEE Computer Society

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Association for Computing Machinery

New York, NY, United States

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Published: 06 May 2002

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CODES02: 10th International Symposium on Hardware/Software Codesign

May 6 - 8, 2002

Colorado, Estes Park

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Cited By

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https://dl.acm.org/doi/10.1145/3643660.3643941
Fu VZaourar LMunier-Kordon ADuranton M(2024)Design Space Exploration of HPC Systems with Random Forest-based Bayesian OptimizationProceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design10.1145/3642921.3642923(9-15)Online publication date: 18-Jan-2024
https://dl.acm.org/doi/10.1145/3642921.3642923
Marussy KFicsor ASemeráth OVarró DRoychoudhury APaiva AAbreu RStorey M(2024)Refinery: Graph Solver as a ServiceProceedings of the 2024 IEEE/ACM 46th International Conference on Software Engineering: Companion Proceedings10.1145/3639478.3640045(64-68)Online publication date: 14-Apr-2024
https://dl.acm.org/doi/10.1145/3639478.3640045
Zheng XCheng MChen JGao HXiong XCai S(2024)BSSE: Design Space Exploration on the BOOM With Semi-Supervised LearningIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2024.336807532:5(860-869)Online publication date: May-2024
https://doi.org/10.1109/TVLSI.2024.3368075
Ghaffari AAsgharian MSavaria Y(2024)Statistical Hardware Design With Multimodel Active LearningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.332098443:2(562-572)Online publication date: Feb-2024
https://doi.org/10.1109/TCAD.2023.3320984
Boroujerdian BJing YTripathy DKumar ASubramanian LYen LLee VVenkatesan VJindal AShearer RReddi V(2023)FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip ComplexityACM Transactions on Embedded Computing Systems10.1145/354401622:2(1-35)Online publication date: 24-Jan-2023
https://dl.acm.org/doi/10.1145/3544016
David IArchambault PWolak QVu CLalonde TRiaz KSyriani ESahraoui H(2023)Digital Twins for Cyber-Biophysical Systems: Challenges and Lessons Learned2023 ACM/IEEE 26th International Conference on Model Driven Engineering Languages and Systems (MODELS)10.1109/MODELS58315.2023.00014(1-12)Online publication date: 1-Oct-2023
https://doi.org/10.1109/MODELS58315.2023.00014
Cao LBale STrefzer M(2023)Multi‐objective digital circuit block optimisation based on cell mapping in an industrial electronic design automation flowIET Computers & Digital Techniques10.1049/cdt2.1206217:3-4(180-194)Online publication date: 26-Jul-2023
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Richard de Latour TChenouard RGranvilliers L(2023)Partial design space exploration strategies applied in preliminary designInternational Journal on Interactive Design and Manufacturing (IJIDeM)10.1007/s12008-023-01377-7Online publication date: 14-Jun-2023
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Hirvonen ALeppänen THepola KMultanen JHoozemans JJääskeläinen P(2023)AEx: Automated High-Level Synthesis of Compiler Programmable Co-ProcessorsJournal of Signal Processing Systems10.1007/s11265-023-01841-395:9(1051-1065)Online publication date: 15-Feb-2023
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