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Parthasarathy G, Rushdi A, Choudhary P, Nanda S, Evans M, Gunasekara H and Rajakumar S RTL Regression Test Selection Using Machine Learning Proceedings of the 27th Asia and South Pacific Design Automation Conference, (281-287)

Lee Y, Nambiar V, Goh K and Tuan Do A Post-Silicon Validation Methodology for Resource-Constrained Neuromorphic Hardware IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society, (3836-3840)

Ceesay-Seitz K, Boukabache H and Perrin D A Functional Verification Methodology for Highly Parametrizable, Continuously Operating Safety-Critical FPGA Designs: Applied to the CERN RadiatiOn Monitoring Electronics (CROME) Computer Safety, Reliability, and Security, (67-81)

Yang X, Wu N and Andrian J (2016). A novel bus transfer mode (AS transfer) and a performance evaluation methodology, Integration, the VLSI Journal, 52:C, (23-33), Online publication date: 1-Jan-2016.

Mueller W and Ecker W Testbenches for advanced TLM verification Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (305-306)

Linehan É, O'Toole E and Clarke S (2012). Model-driven automation for simulation-based functional verification, ACM Transactions on Design Automation of Electronic Systems (TODAES), 17:3, (1-25), Online publication date: 1-Jun-2012.

Nikhil R (2011). Abstraction in hardware system design, Communications of the ACM, 54:10, (36-44), Online publication date: 1-Oct-2011.

Nikhil R (2011). Abstraction in Hardware System Design, Queue, 9:8, (40-54), Online publication date: 1-Aug-2011.

Kadry W, Morad R, Goryachev A, Almog E and Krygowski C Facing the challenge of new design features Proceedings of the 48th Design Automation Conference, (842-847)

Ryzhyk L, Keys J, Mirla B, Raghunath A, Vij M and Heiser G (2011). Improved device driver reliability through hardware verification reuse, ACM SIGPLAN Notices, 46:3, (133-144), Online publication date: 17-Mar-2011.

Ryzhyk L, Keys J, Mirla B, Raghunath A, Vij M and Heiser G (2011). Improved device driver reliability through hardware verification reuse, ACM SIGARCH Computer Architecture News, 39:1, (133-144), Online publication date: 17-Mar-2011.

Ryzhyk L, Keys J, Mirla B, Raghunath A, Vij M and Heiser G Improved device driver reliability through hardware verification reuse Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems, (133-144)

Gluska A and Libis L Shortening the verification cycle with synthesizable abstract models Proceedings of the 46th Annual Design Automation Conference, (454-459)

Foster H (2018). Applied Assertion-Based Verification, Foundations and Trends in Electronic Design Automation, 3:1, (1-95), Online publication date: 1-Jan-2009.

Martin G, Bailey B and Piziali A (2007). ESL Design and Verification, 10.5555/2155698, Online publication date: 23-Feb-2007.

Yarom I and Patil V Smart-lint Proceedings of the 2nd international Haifa verification conference on Hardware and software, verification and testing, (81-91)

Armoni R, Korchemny D, Tiemeyer A, Vardi M and Zbar Y Deterministic dynamic monitors for linear-time assertions Proceedings of the First combined international conference on Formal Approaches to Software Testing and Runtime Verification, (163-177)

Bruce A, Kamal Hashmi M, Nightingale A, Beavis S, Romdhane N and Lennard C Maintaining consistency between systemC and RTL system designs Proceedings of the 43rd annual Design Automation Conference, (85-89)