Article

Dynamic reconfiguration of FPGAs

Authors:

Patrick Lysaght,

John DunlopAuthors Info & Claims

Selected papers from the Oxford 1993 international workshop on field programmable logic and applications on More FPGAs

Pages 82 - 94

Published: 01 July 1994 Publication History

Abstract

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Cited By

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Leong PAmano HAnderson JBertels KCardoso JDiessel OGogniat GHutton MLee JLuk WLysaght PPlatzner MPrasanna VRissa TSilvano CSo HWang Y(2017)The First 25 Years of the FPL ConferenceACM Transactions on Reconfigurable Technology and Systems10.1145/299646810:2(1-17)Online publication date: 22-Mar-2017
https://dl.acm.org/doi/10.1145/2996468
Michael NVinod AMoy CPalicot J(2011)Flexibility and Reusability in the Digital Front-End of Cognitive Radio TerminalsCircuits, Systems, and Signal Processing10.1007/s00034-011-9306-930:4(799-821)Online publication date: 1-Aug-2011
https://dl.acm.org/doi/10.1007/s00034-011-9306-9
Huang CVahid F(2009)Transmuting coprocessorsProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630127(848-851)Online publication date: 26-Jul-2009
https://dl.acm.org/doi/10.1145/1629911.1630127
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Index Terms

Dynamic reconfiguration of FPGAs
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Combinational circuits
  2. Very large scale integration design
    1. Application-specific VLSI designs

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Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation
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Reconfigurable computers have demonstrated performance advantages over general-purpose processors for some classes of problems. However, some problems need hardware changes while in operation. A technique where a dynamic reconfiguration behavior was ...

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Published In

Selected papers from the Oxford 1993 international workshop on field programmable logic and applications on More FPGAs

July 1994

467 pages

ISBN:0951845314

Editors:
Will R. Moore
Univ. of Oxford, Oxford, UK
,
Wayne Luk
Univ. of Oxford, Oxford, UK

Publisher

Abingdon EE&CS Books

United Kingdom

Publication History

Published: 01 July 1994

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Cited By

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Leong PAmano HAnderson JBertels KCardoso JDiessel OGogniat GHutton MLee JLuk WLysaght PPlatzner MPrasanna VRissa TSilvano CSo HWang Y(2017)The First 25 Years of the FPL ConferenceACM Transactions on Reconfigurable Technology and Systems10.1145/299646810:2(1-17)Online publication date: 22-Mar-2017
https://dl.acm.org/doi/10.1145/2996468
Michael NVinod AMoy CPalicot J(2011)Flexibility and Reusability in the Digital Front-End of Cognitive Radio TerminalsCircuits, Systems, and Signal Processing10.1007/s00034-011-9306-930:4(799-821)Online publication date: 1-Aug-2011
https://dl.acm.org/doi/10.1007/s00034-011-9306-9
Huang CVahid F(2009)Transmuting coprocessorsProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630127(848-851)Online publication date: 26-Jul-2009
https://dl.acm.org/doi/10.1145/1629911.1630127
Harkin JMcGinnity TMaguire L(2004)Modeling and optimizing run-time reconfiguration using evolutionary computationACM Transactions on Embedded Computing Systems10.1145/1027794.10277953:4(661-685)Online publication date: 1-Nov-2004
https://dl.acm.org/doi/10.1145/1027794.1027795
Tanougast CBerviller YWeber SBrunet P(2003)A partitioning methodology that optimises the area on reconfigurable real-time embedded systemsEURASIP Journal on Advances in Signal Processing10.1155/S11108657032120512003(494-501)Online publication date: 1-Jan-2003
https://dl.acm.org/doi/10.1155/S1110865703212051
Koch GKebschull URosenstiel WBuchenrieder KWolf W(1994)A prototyping environment for hardware/software codesign in the COBRA projectProceedings of the 3rd international workshop on Hardware/software co-design10.5555/947185.947188(10-16)Online publication date: 22-Sep-1994
https://dl.acm.org/doi/10.5555/947185.947188

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Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation

Partial dynamic reconfiguration framework for FPGAs through remote access

Dynamic Reconfiguration Behavior Using Generic FPGAs and FPIDs

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