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Relay Propagation Scheme for Testing of MCMs on Large Area Substrates

Published: 11 March 1996 Publication History

Abstract

This paper addresses the issue of testing MCMs on large area substrates. The cost of testing MCMs may be as high as 40 % of the total manufacturing cost. It is critical that the test process be parallelized in order that multiple MCMs may be tested for the cost of testing one MCM. With this objective in mind, we propose a parallel and pipelined relay propagation scheme for the testing of MCMs on large area substrates. In this scheme, the test vectors and the corresponding correct-response vectors are both scanned into the MCM scan chain sequentially. They are then relayed on from one MCM to the next down the chain. Simultaneously the MCMs are tested in parallel. Our algorithm allows an order of magnitude speed-up in test time over conventional boundary scan based testing schemes.

References

[1]
[1] R. R. Tumalla, "Low-Cost Portable Electronic Packaging", submitted to NSF, Sept. 1994.
[2]
[2] K. E. Posse, "A Design-For-Testability Architecture for Multi-Chip Modules", Proceedings, International Test Conference, 1991, pp. 113-121.
[3]
[3] D. C. Keezer, "Electronic Test Methods for Multichip Modules", Proceedings, 8th Electronic Materials and Processing Congress, 1993, pp. 131- 137.
[4]
[4] IEEE Std 1149.1-1990 (including IEEE-Std 1149.1a-1993) Test Access Port and Boundary-Scan Architecture Standard, IEEE, Oct-1993.
[5]
[5] K. Sasidhar, A. Chatterjee, V. K. Agarwal and J. Hughes, "Distributed Probabilistic Diagnosis of MCMs on Large Area Substrates", Proceedings, International Test Conference, 1995.
[6]
[6] N. Jarwala, "Designing Dual Personality IEEE 1149.1 Compliant Multi-Chip Modules", Proceedings, International Test Conference, 1994, pp. 446-455.

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cover image ACM Conferences
EDTC '96: Proceedings of the 1996 European conference on Design and Test
March 1996
585 pages
ISBN:0818674237

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IEEE Computer Society

United States

Publication History

Published: 11 March 1996

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Author Tags

  1. Boundary Scan
  2. Multi Chip Modules
  3. Relay propagation Scheme
  4. large Area Substrates

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