Article

Quantitative analysis of floating point arithmetic on FPGA based custom computing machines

Authors:

N. Shirazi,

A. Walters,

P. AthanasAuthors Info & Claims

FCCM '95: Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines

Page 155

Published: 19 April 1995 Publication History

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Abstract

Abstract: Many algorithms rely on floating point arithmetic for the dynamic range of representations and require millions of calculations per second. Such computationally intensive algorithms are candidates for acceleration using custom computing machines (CCMs) being tailored for the application. Unfortunately, floating point operators require excessive area (or time) for conventional implementations. Instead, custom formats, derived for individual applications, are feasible on CCMs, and can be implemented on a fraction of a single FPGA. Using higher-level languages, like VHDL, facilitates the development of custom operators without significantly impacting operator performance or area. Properties, including area consumption and speed of working arithmetic operator units used in real-time applications, are discussed.

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FCCM '95: Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines

April 1995

ISBN:081867086X

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IEEE Computer Society

United States

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Published: 19 April 1995

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Laurain TLauber JPalhares R(2018)Avoiding Matrix Inversion in Takagi–Sugeno-Based Advanced Controllers and ObserversIEEE Transactions on Fuzzy Systems10.1109/TFUZZ.2017.264799226:1(216-225)Online publication date: 1-Feb-2018
de Dinechin FEcheverría PLópez-Vallejo MPasca B(2013)Floating-Point Exponentiation Units for Reconfigurable ComputingACM Transactions on Reconfigurable Technology and Systems10.1145/2457443.24574476:1(1-15)Online publication date: 1-May-2013
Sano KLuzhou WHatsuda YIizuka TYamamoto S(2010)FPGA-Array with Bandwidth-Reduction Mechanism for Scalable and Power-Efficient Numerical Simulations Based on Finite Difference MethodsACM Transactions on Reconfigurable Technology and Systems10.1145/1862648.18626513:4(1-35)Online publication date: 1-Nov-2010
Wang XLeeser M(2010)VFloatACM Transactions on Reconfigurable Technology and Systems10.1145/1839480.18394863:3(1-34)Online publication date: 1-Sep-2010
Hemmert KUnderwood K(2010)Fast, Efficient Floating-Point Adders and Multipliers for FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/1839480.18394813:3(1-30)Online publication date: 1-Sep-2010
Cardoso JDiniz PWeinhardt M(2010)Compiling for reconfigurable computingACM Computing Surveys10.1145/1749603.174960442:4(1-65)Online publication date: 23-Jun-2010
Jin ZPittman RForin ACheung PWawrzynek J(2010)Reconfigurable custom floating-point instructions (abstract only)Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1723112.1723173(287-287)Online publication date: 21-Feb-2010
Hauck SDeHon A(2007)Reconfigurable ComputingundefinedOnline publication date: 2-Nov-2007
Pu YHa YHirose F(2006)An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic modelProceedings of the 2006 Asia and South Pacific Design Automation Conference10.1145/1118299.1118500(886-891)Online publication date: 24-Jan-2006
Underwood KTessier RSchmit H(2004)FPGAs vs. CPUsProceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays10.1145/968280.968305(171-180)Online publication date: 22-Feb-2004
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