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- ArticleJuly 2012
Automated Synthesis of FSMD-Based Accelerators for Hardware Compilation
ASAP '12: Proceedings of the 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and ProcessorsJuly 2012, Pages 157–160https://doi.org/10.1109/ASAP.2012.29In this work we extend the FSMD (Finite-State Machine with Datapath) model to encompass synchronous memory accesses, intermodule communication and hardware-optimizing transformations. A lightweight typed assembly language, N-Address Code (NAC), is used ...
- ArticleApril 2008
FSMD Partitioning for Low Power Using ILP
ISVLSI '08: Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSIApril 2008, Pages 63–68https://doi.org/10.1109/ISVLSI.2008.67It is well known that significant power savings can be obtained by disabling or shutting down parts of a circuit during idle periods. One method is to use a high level partitioning technique which considers both the controller and the datapath together. ...
- ArticleSeptember 2001
RTL semantics and methodology
ISSS '01: Proceedings of the 14th international symposium on Systems synthesisSeptember 2001, Pages 69–74https://doi.org/10.1145/500001.500017In the past, the EDA industry and designers have struggled with the issues of having multiple languages in use for describing, implementing and verifying their designs, such as Verilog and VHDL. This has led to gross inefficiencies in the industry with ...
- ArticleFebruary 1998
Graphical entry of FSMDs revisited: putting graphical models on a solid base
DATE '98: Proceedings of the conference on Design, automation and test in EuropeFebruary 1998, Pages 931–932The paper discusses issues of graphical modelling of Finite State Machines with Datapath (FSMDs). Tools supporting the graphical entry of state based systems are usable by intuition, but need to be based on an exact definition of semantics of graphical ...