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- research-articleMay 2015
Runtime and Architecture Support for Efficient Data Exchange in Multi-Accelerator Applications
IEEE Transactions on Parallel and Distributed Systems (TPDS), Volume 26, Issue 5May 2015, Pages 1405–1418https://doi.org/10.1109/TPDS.2014.2316825Heterogeneous parallel computing applications often process large data sets that require multiple GPUs to jointly meet their needs for physical memory capacity and compute throughput. However, the lack of high-level abstractions in previous heterogeneous ...
- research-articleJanuary 2015
Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs
IEEE Computer Architecture Letters (ICAL), Volume 14, Issue 1Jan.-June 2015, Pages 66–69https://doi.org/10.1109/LCA.2014.2319079Dynamic voltage and frequency scaling (DVFS) is a key technique for reducing processor power consumption in mobile devices. In recent years, mobile system-on-chips (SoCs) has supported DVFS for embedded graphics processing units (GPUs) as the processing ...
- research-articleOctober 2014
Attitude towards the use of mobile devices for the practice of oral skills in English
TEEM '14: Proceedings of the Second International Conference on Technological Ecosystems for Enhancing MulticulturalityOctober 2014, Pages 387–391https://doi.org/10.1145/2669711.2669928In this paper, we describe a project carried out to get information about the use and expectations of students towards mobile apps as educational resources. We focus our research on the leading role that Communication and Information Technologies have ...
- research-articleOctober 2014
Mobile apps and computational systems as learning tools
TEEM '14: Proceedings of the Second International Conference on Technological Ecosystems for Enhancing MulticulturalityOctober 2014, Pages 341–342https://doi.org/10.1145/2669711.2669921There is nowadays no need to mention the more and more relevant position that mobile devices are gaining in our contemporary society. Communication possibilities have experienced an exponential growth thanks to the popularization of devices, which, ...
- research-articleNovember 2013
Applying KISS to Healthcare Information Technology
Current public and private healthcare information technology initiatives have failed to achieve secure integration among providers. Applying the "keep it simple, stupid" principle offers key guidance for solving this problem.
- articleMay 2013
A Safety-First Approach to Memory Models
Recent efforts to standardize concurrency semantics for programming languages require programmers to explicitly annotate all memory accesses that can participate in a data race ("unsafe" accesses). This requirement allows the compiler and hardware to ...
- articleMay 2013
Hardware-Enforced Comprehensive Memory Safety
The lack of memory safety in languages such as C and C++ is a root source of exploitable security vulnerabilities. This article presents Watchdog, a hardware approach that eliminates such vulnerabilities by enforcing comprehensive memory safety. ...
- research-articleJanuary 2012
Effective and Efficient Memory Protection Using Dynamic Tainting
IEEE Transactions on Computers (ITCO), Volume 61, Issue 1January 2012, Pages 87–100https://doi.org/10.1109/TC.2010.215Programs written in languages allowing direct access to memory through pointers often contain memory-related faults, which cause nondeterministic failures and security vulnerabilities. We present a new dynamic tainting technique to detect illegal memory ...
- keynoteOctober 2011
Automatic generation of hardware/software interfaces
CASES '11: Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systemsOctober 2011, Pages 1–2https://doi.org/10.1145/2038698.2038700Specialized hardware is necessary to reduce power consumption in mobile devices. Current design methodologies require an early partitioning of the application, allowing the hardware and software to be developed simultaneously, each adhering to a rigid ...
- research-articleMay 2011
Energy-Aware Accounting and Billing in Large-Scale Computing Facilities
- Victor Jimenez,
- Francisco Cazorla,
- Roberto Gioiosa,
- Eren Kursun,
- Canturk Isci,
- Alper Buyuktosunoglu,
- Pradip Bose,
- Mateo Valero
Proposals have focused on reducing energy requirements for large-scale computing facilities (LSCFs), but little research has addressed the need for energy-usage-based accounting. Energy-aware accounting and billing benefits LSCF owners and users. This ...
- research-articleSeptember 2010
Parallel Programming Models for Heterogeneous Multicore Architectures
This article evaluates the scalability and productivity of six parallel programming models for heterogeneous architectures, and finds that task-based models using code and data annotations require the minimum programming effort while sustaining nearly ...
- research-articleMay 2009
Maintaining I/O Data Coherence in Embedded Multicore Systems
In embedded systems, multiple cores mean multiple caches and often multiple cache levels. Consequently, maintaining coherency between the cores' caches and the data generated or consumed by I/O devices is challenging, with different solutions trading ...
- articleMay 2007
Prototyping Multiprocessor System-on-Chip Applications: A Platform-Based Approach
IEEE Distributed Systems Online (IEEE-DSO), Volume 8, Issue 5May 2007, Page 2https://doi.org/10.1109/MDSO.2007.28Multiprocessor system-on-chip designers face challenges during prototyping, when there is a real need for methods and tools that can easily map applications onto different architectures without tedious redesigning. Such methods and tools must also ...
- research-articleJanuary 2007
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems
IEEE Transactions on Computers (ITCO), Volume 56, Issue 1January 2007, Pages 2–17Many modern applications have a significant operating system (OS) component. The OS execution affects various architectural states, including the dynamic branch predictions, which are widely used in today's high-performance microprocessor designs to ...
- research-articleJanuary 2007
Transactional Memory: The Hardware-Software Interface
- Austen McDonald,
- Brian D. Carlstrom,
- JaeWoong Chung,
- Chi Cao Minh,
- Hassan Chafi,
- Christos Kozyrakis,
- Kunle Olukotun
This comprehensive architecture supports nested transactions, transaction handling, and two-phase commit. The result is a seamless integration of transactional memory with modern programming languages and runtime environments.
- research-articleJune 2006
Program Counter-Based Prediction Techniques for Dynamic Power Management
IEEE Transactions on Computers (ITCO), Volume 55, Issue 6June 2006, Pages 641–658https://doi.org/10.1109/TC.2006.87Reducing energy consumption has become one of the major challenges in designing future computing systems. This paper proposes a novel idea of using program counters to predict I/O activities in the operating system. It presents a complete design of ...
- ArticleSeptember 2005
Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design
- Adriano Sarmento,
- Lobna Kriaa,
- Arnaud Grasset,
- Mohamed-Wassim Youssef,
- Aimen Bouchhima,
- Frederic Rousseau,
- Wander Cesario,
- Ahmed Amine Jerraya
CODES+ISSS '05: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesisSeptember 2005, Pages 261–266https://doi.org/10.1145/1084834.1084900Complex systems-on-chip are designed by interconnecting pre-designed hardware (HW) and software (SW) components. During the design cycle, a global model of the SoC may be composed of HW and SW models at different abstraction levels. Designing HW/SW ...
- ArticleSeptember 2005
A unified HW/SW interface model to remove discontinuities between HW and SW design
EMSOFT '05: Proceedings of the 5th ACM international conference on Embedded softwareSeptember 2005, Pages 159–163https://doi.org/10.1145/1086228.1086258One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software. Traditional ASIC designer and software designer model HW/SW interface twice. Using two separate models introduces a ...
- ArticleDecember 1995
Interface co-synthesis techniques for embedded systems
ICCAD '95: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided designDecember 1995, Pages 280–287Abstract: A key aspect of the synthesis of embedded systems is the automatic integration of system components. This entails the derivation of both the hardware and software interfaces that will bind these elements together and permit them to communicate ...