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- research-articleJune 2022
Eliminate the overhead of interrupt checking in full-system dynamic binary translator
SYSTOR '22: Proceedings of the 15th ACM International Conference on Systems and StoragePages 1–12https://doi.org/10.1145/3534056.3534939Dynamic binary translation (DBT) is a ubiquitous technique for program emulation, instrumentation and debugging. Full-system dynamic binary translators, which can run operating systems, are required to emulate interrupt delivery. Existing full-system ...
- research-articleJanuary 2021
Asynchronous effects
Proceedings of the ACM on Programming Languages (PACMPL), Volume 5, Issue POPLArticle No.: 24, Pages 1–28https://doi.org/10.1145/3434305We explore asynchronous programming with algebraic effects. We complement their conventional synchronous treatment by showing how to naturally also accommodate asynchrony within them, namely, by decoupling the execution of operation calls into signalling ...
- research-articleOctober 2017
Binary synthesis implementing external interrupt handler as independent module
RSP '17: Proceedings of the 28th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to PrototypePages 92–98https://doi.org/10.1145/3130265.3130317This article presents a method of synthesizing hardware from a given executable binary code with an external interrupt handler, where the normal flow and the interrupt handling are executed by separate hardware modules. Our previous method synthesized ...
- ArticleAugust 2015
Responsive and Enforced Interrupt Handling for Real-Time System Virtualization
RTCSA '15: Proceedings of the 2015 IEEE 21st International Conference on Embedded and Real-Time Computing Systems and ApplicationsPages 90–99https://doi.org/10.1109/RTCSA.2015.15The increasing performance of modern processors makes virtualization a viable solution for consolidating real-time systems into a single hardware platform. Although real-time task scheduling in a virtual machine can benefit from hierarchical scheduling, ...
- ArticleSeptember 2014
iDola: Bridge Modeling to Verification and Implementation of Interrupt-Driven Systems
TASE '14: Proceedings of the 2014 Theoretical Aspects of Software Engineering Conference (tase 2014)Pages 193–200https://doi.org/10.1109/TASE.2014.33In real-time embedded applications, interrupt-driven systems are widely adopted due to strict timing requirements. However, development of interrupt-driven systems is time-consuming and error-prone. To conveniently ensure a trustworthy system design and ...
- research-articleOctober 2012
A new I/O model for the real-time specification for Java
JTRES '12: Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded SystemsPages 26–33https://doi.org/10.1145/2388936.2388942The Real-Time Specification for Java (RTSJ) does not only provide features for realtime programming but also for direct device access. Both reading and writing to a device and reacting to external signals are supported. Unfortunately, the APIs provided ...
- ArticleJuly 2012
Robust Real-Time Multiprocessor Interrupt Handling Motivated by GPUs
ECRTS '12: Proceedings of the 2012 24th Euromicro Conference on Real-Time SystemsPages 267–276https://doi.org/10.1109/ECRTS.2012.20Architectures in which multicore chips are augmented with graphics processing units (GPUs) have great potential in many domains in which computationally intensive real-time workloads must be supported. However, unlike standard CPUs, GPUs are treated as ...
- research-articleJuly 2011
Student mini-kernel project based on an FPGA board
ACM SIGOPS Operating Systems Review (SIGOPS), Volume 45, Issue 2Pages 54–58https://doi.org/10.1145/2007183.2007190The paper describes a mini-kernel project in the context of a Concurrent Programming course. The goal of the project is to implement Java monitors and interrupt handling. The platform for the project is an FPGA board developed initially at EPFL for ...
- research-articleApril 2010
Interrupt handler migration and direct interrupt scheduling for rapid scheduling of interrupt-driven tasks
ACM Transactions on Embedded Computing Systems (TECS), Volume 9, Issue 4Article No.: 42, Pages 1–34https://doi.org/10.1145/1721695.1721708In this article, we propose two techniques that aim to minimize the scheduling latency of high-priority interrupt-driven tasks, named the Interrupt Handler Migration (IHM) and Direct Interrupt Scheduling (DIS). The IHM allows the interrupt handler to be ...
- research-articleOctober 2009
Parallel, hardware-supported interrupt handling in an event-triggered real-time operating system
- Fabian Scheler,
- Wanja Hofer,
- Benjamin Oechslein,
- Rudi Pfister,
- Wolfgang Schröder-Preikschat,
- Daniel Lohmann
CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systemsPages 167–174https://doi.org/10.1145/1629395.1629419A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic ...
- ArticleAugust 2009
Delayed Interrupt Processing Technique for Reducing Latency of Timer Interrupt in Embedded Linux
CSE '09: Proceedings of the 2009 International Conference on Computational Science and Engineering - Volume 02Pages 388–393https://doi.org/10.1109/CSE.2009.221In real-time operating systems, timer interrupts are usually used for indicating when a real-time task should be started. Critical sections with interrupts disabled can, however, cause an unacceptable delay in the execution of these tasks. Existing ...
- research-articleOctober 2008
Evaluation of interrupt handling timeliness in real-time Linux operating systems
ACM SIGOPS Operating Systems Review (SIGOPS), Volume 42, Issue 6Pages 52–63https://doi.org/10.1145/1453775.1453787Several real-time Linux extensions are available nowadays. Two of those extensions that have received special attention recently are Preempt-RT and Xenomai. This paper evaluates to what extent they provide deterministic guarantees when reacting to ...
- articleJuly 2008
Proving Correctness of an Efficient Abstraction for Interrupt Handling
Electronic Notes in Theoretical Computer Science (ENTCS) (ENTCS), Volume 217Pages 133–150https://doi.org/10.1016/j.entcs.2008.06.046This paper presents an approach to the efficient abstraction of interrupt handling in microcontroller systems. Such systems usually operate in uncertain environments, giving rise to a high degree of nondeterminism in the corresponding formal models, ...
- ArticleMay 2007
Transparent and selective real-time interrupt services for performance improvement
- Jinkyu Jeong,
- Euiseong Seo,
- Dongsung Kim,
- Jin-Soo Kim,
- Joonwon Lee,
- Yung-Joon Jung,
- Donghwan Kim,
- Kanghee Kim
The popularity of mobile and multimedia applications made real-time support a mandatory feature for embedded operating systems. However, the current situation is that the overall performance is significantly degraded due to the real-time support. This ...
- ArticleOctober 1995
Performance comparison of real-time architectures using simulation
This paper presents a performance comparison of real-time system architectures. A discrete event-driven, task-based simulator is developed for evaluating the performance of parallel and distributed real-time systems. Real-time system components such as ...
- ArticleApril 1995
Minimizing communication overhead for matrix inversion algorithms on hypercubes
We propose novel parallel Gauss-Jordan inversion algorithms (with or without partial pivoting) under different data partitioning strategies. The machine model we assume is a MIMD hypercube, using asynchronous message passing, with the software ...
- research-articleJanuary 1993
Interrupt Handling for Out-of-Order Execution Processors
IEEE Transactions on Computers (ITCO), Volume 42, Issue 1Pages 122–127https://doi.org/10.1109/12.192223Processors with multiple functional units, including the superscalars, achieve significant performance enhancement through low-level execution concurrency. In such processors, multiple instructions are often issued and definitely executed concurrently ...
- research-articleNovember 1978
ASSIST-V: An Environment Simulator for IBM 360 Systems Software Development
IEEE Transactions on Software Engineering (ISOF), Volume 4, Issue 6Pages 526–530https://doi.org/10.1109/TSE.1978.234139This paper describes ASSIST-V, a software tool designed for use in the teaching of operating systems, fie management, and machine architecture courses. ASSIST-V is a program that provides an environment for the implementation, testing, and evaluation of ...